IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
HIGH PERFORMANCE
CMOS BUFFER
IDT54/74FCT827A/B/C
FEATURES:
−
−
−
−
−
−
−
−
−
−
−
−
−
Faster than AMD’s Am29827 series
Equivalent to AMD’s Am29827 bipolar buffers in pinout/function,
speed and output drive over full temperature and voltage supply
extremes
IDT54/74FCT827A equivalent to FAST™
IDT54/74FCT827B 35% faster than FAST
IDT54/74FCT827C 45% faster than FAST
IOL = 48mA (commercial), and 32mA (military)
Clamp diodes on all inputs for ringing suppression
CMOS power levels (1mW typ. static)
TTL input and output level compatible
CMOS output level compatible
Substantially lower input current levels than AMD’s bipolar
Am29800 series (5µ A max.)
Military product compliant to MIL-STD-883, Class B
Available in the following packages:
•
Commercial: SOIC
•
Military: CERDIP, LCC, CERPACK
DESCRIPTION:
The IDT54/74FCT800 series is built using an advanced dual metal
CMOS technology.
The IDT54/74FCT827 10-bit bus drivers provide high-performance bus
interface buffering for wide data/address paths or buses carrying parity. The
10-bit buffers have NAND-ed output enables for maximum control flexibility.
All of the IDT54/74FCT800 high-performance interface family are de-
signed for high-capacitance load drive capability, while providing low-
capacitance bus loading at both inputs and outputs. All inputs have clamp
diodes and all outputs are designed for low-capacitance bus loading in high-
impedance state.
FUNCTIONAL BLOCK DIAGRAM
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
OE
1
OE
2
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
1999 Integrated Device Technology, Inc.
JULY 2000
DSC-4612/2
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
OE
1
D
1
D
0
NC
OE
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
GND
1
2
3
4
5
6
7
8
9
10
11
12
D24-1
SO24-2
E24-1
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
Y
0
Y
1
Y
2
4
3
2
1
28
27
Y
0
26
25
24
23
D
2
D
3
5
6
7
8
9
10
11
12
13
14
Y
1
INDEX
V
CC
Y
2
Y
3
Y
4
NC
Y
5
Y
6
Y
7
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
D
4
NC
D
5
D
6
D
7
L28-1
22
21
20
19
15
16
17
18
D
8
D
9
GND
NC
OE
2
Y
9
OE
2
CERDIP/ SOIC/ CERPACK
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Commercial
–0.5 to +7
–0.5 to V
CC
0 to +70
–55 to +125
–55 to +125
0.5
120
Military
–0.5 to +7
–0.5 to V
CC
–55 to +125
–65 to +135
–65 to +150
0.5
120
Unit
V
V
°C
°C
°C
W
mA
8-link
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8-link
NOTE:
1. This parameter is measured at characterization but not tested.
LOGIC SYMBOL
10
10
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed V
CC
by +.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
D
0-9
Y
8
Y
0-9
Y
9
OE
1
OE
2
2
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Name
OE
I
D
I
Y
I
I/O
FUNCTION TABLE
(1)
Inputs
OE
1
L
L
H
X
OE
2
L
L
X
H
D
I
L
H
X
X
Output
Y
I
L
H
Z
Z
Function
Transparent
Three-State
I
I
O
Description
When both are LOW, the outputs are enabled. When
either one or both are HIGH, the outputs are High Z.
10-bit data input.
10-bit data output.
NOTE:
1. H = HIGH
L = LOW
X = Don't Care
Z = High-Impedance
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
–0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ± 5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V ± 10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
OH
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µ A
V
CC
= Min.
V
IN
= V
IH
or V
IL
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Off State (High Impedance)
Output Current
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
CC
= Max.
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–75
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.5
0.5
Unit
V
V
µA
µA
V
mA
V
I
OH
= –300µ A
I
OH
= –15mA MIL.
I
OH
= –24mA COM'L.
V
OL
Output LOW Voltage
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µ A
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µ A
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
V
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
3
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
1
=
OE
2
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
Eight Bits Toggling
Min.
—
—
V
IN
≥
V
HC
V
IN
≤
V
LC
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4
mA
—
2
5
—
3.2
6.5
(5)
—
5.2
14.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT827A/B/C
HIGH PERFORMANCE CMOS BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS
IDT54/74FCT827A
Com'l.
Parameter
t
PLH
t
PHL
Description
Propagation Delay
D
I
to Y
I
Conditions
(1)
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 5pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
Mil.
IDT54/74FCT827B
Com'l.
Mil.
IDT54/74FCT827C
Com'l.
Mil.
Unit
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
Min
.
(2)
Max
.
1.5
1.5
1.5
1.5
1.5
1.5
8
15
12
23
9
10
1.5
1.5
1.5
1.5
1.5
1.5
9
17
13
25
9
10
1.5
1.5
1.5
1.5
1.5
1.5
5
13
8
15
6
7
1.5
1.5
1.5
1.5
1.5
1.5
6.5
14
9
16
7
8
1.5
1.5
1.5
1.5
1.5
1.5
4.4
10
7
14
5.7
6
1.5
1.5
1.5
1.5
1.5
1.5
5
11
8
15
6.7
7
ns
t
PZH
t
PZL
Output Enable Time
OE
I
to Y
I
ns
t
PHZ
t
PLZ
Output Disable Time
OE
I
to Y
I
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. These parameters are guaranteed but not tested.
5
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