Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
The S-818 Series is a positive voltage regulator developed
utilizing CMOS technology featured by low dropout voltage,
high output voltage accuracy and low current consumption.
Built-in low on-resistance transistor provides low dropout
voltage and large output current. A ceramic capacitor of 2
µF
or more can be used as an output capacitor. A power-OFF
circuit ensures long battery life.
The SOT-23-5 miniaturized package and the SOT-89-5
package are recommended for configuring portable devices
and large output current applications, respectively.
Features
Applications
During operation: Typ. 30
µA,
Max. 40
µA
During power off: Typ. 100 nA, Max. 500 nA
O
Output voltage: 0.1 V steps between 2.0 and 6.0 V
O
High accuracy output voltage:
±2.0%
O
Peak output current;
Note
200 mA capable (3.0 V output product, V
IN
=4 V)
Note
300 mA capable (5.0 V output product, V
IN
=6 V)
O
Low dropout voltage
Typ. 170 mV (5.0 V output product, I
OUT
= 60 mA)
A ceramic capacitor (2
µF
or more) can be used as an
output capacitor.
O
Built-in power-off circuit
O
Compact package: SOT-23-5, SOT-89-5
O
Low current consumption
O
Power source for
battery-powered devices
O
Power source for
personal communication devices
O
Power source for home electric/electronic
appliances
Note : Please consider power dissipation of the package when the output current is large.
Package
O
5-pin SOT-23-5 (Package drawing code: MP005-A)
O
5-pin SOT-89-5 (Package drawing code: UP005-A)
Seiko Instruments Inc.
1
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Block Diagram
*1
VIN
VOUT
Rev.1.2
ON/OFF
ON/OFF
circuit
Reference
voltage
VSS
*1: Parasitic diode
Figure 1 Block Diagram
Selection Guide
1. Product Name
S-818x xx A xx - xxx - T2
IC orientation in taping specifications
Product abbreviation
Package type MC : SOT-23-5
UC : SOT-89-5
Output voltage x 10
Product type
A: ON/OFF pin has positive logic (high active)
B: ON/OFF pin has negative logic (low active)
Table 1
Output Voltage
Selection Guide
SOT-89-5
S-818A20AUC-BGA-T2
S-818A25AUC-BGF-T2
S-818A28AUC-BGI-T2
S-818A30AUC-BGK-T2
S-818A33AUC-BGN-T2
S-818A38AUC-BGS-T2
S-818A40AUC-BGU-T2
S-818A50AUC-BHE-T2
2.0 V ± 2.0%
2.5 V ± 2.0%
2.8 V ± 2.0%
3.0 V ± 2.0%
3.3 V ± 2.0%
3.8 V ± 2.0%
4.0 V ± 2.0%
5.0 V ± 2.0%
Note:
Contact SII sales division for product with an output voltage other than those
specified above or product type B, low active product.
SOT-23-5
S-818A20AMC-BGA-T2
S-818A25AMC-BGF-T2
S-818A28AMC-BGI-T2
S-818A30AMC-BGK-T2
S-818A33AMC-BGN-T2
S-818A38AMC-BGS-T2
S-818A40AMC-BGU-T2
S-818A50AMC-BHE-T2
2
Seiko Instruments Inc.
Rev.1.2
Pin Configuration
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Please refer to the package drawings at the end of this document for details.
Table 2 Pin Assignment
5
4
Pin No.
1
2
3
4
Symbol
VIN
VSS
ON/OFF
NC
Note
Description
Voltage input pin
GND pin
Power off pin
No connection
Voltage output pin
SOT-23-5
Top view
1
2
3
5
VOUT
Figure 2 SOT-23-5
Table 3 Pin Assignment
Pin No.
5
4
Symbol
VOUT
VSS
NC
Note
Description
Voltage output pin
GND pin
No connection
Power off pin
Voltage input pin
1
2
3
4
5
SOT-89-5
Top view
ON/OFF
VIN
1
2
3
Note
:
NC means electrical open. Connecting
NC pin to VIN or VSS is allowed.
Figure 3 SOT-89-5
Absolute Maximum Ratings
Table 4 Absolute Maximum Ratings
(Ta=25°C unless otherwise specified)
Symbol
Absolute Maximum Rating
Unit
V
IN
V
ON / OFF
V
OUT
P
D
Tope
Tstg
12
V
SS
-0.3 to 12
V
SS
-0.3 to V
IN
+0.3
250 (SOT-23-5)
500 (SOT-89-5)
-40 to +85
-40 to +125
V
V
V
mW
°C
°C
Parameter
Input voltage
Output voltage
Power dissipation
Operating temperature range
Storage temperature range
The IC has a protection circuit against static electricity. DO NOT apply high static electricity or high voltage
that exceeds the performance of the protection circuit to the IC.
Seiko Instruments Inc.
3
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Electrical Characteristics
S-818AXXAMC/UC, S-818BXXAMC/UC
Rev.1.2
Table 5 Electrical Characteristics
Parameter
Output voltage
Output current
*1)
*2)
(Ta=25°C unless otherwise specified)
Min.
Typ.
Max.
Test
Units circuit
s
1
3
3
3
3
3
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
4
4
4
4
5
Symbol
V
OUT
(E)
I
OUT
Conditions
V
IN
=V
OUT
(S)+1V,I
OUT
=30mA
V
OUT
(S)+
1V
≤
V
IN
≤10V
2.0V
≤V
OUT
(S)
≤2.4V
2.5V
≤V
OUT
(S)
≤2.9V
3.0V
≤V
OUT
(S)
≤3.9V
4.0V
≤V
OUT
(S)
≤4.9V
5.0V
≤V
OUT
(S)
≤6.0V
*3)
Dropout voltage
Vdrop
I
OUT
=
2.0V
≤V
OUT
(S)
≤2.4V
60mA
2.5V
≤V
OUT
(S)
≤2.9V
3.0V
≤V
OUT
(S)
≤3.4V
3.5V
≤V
OUT
(S)
≤3.9V
4.0V
≤V
OUT
(S)
≤4.4V
4.5V
≤V
OUT
(S)
≤4.9V
5.0V
≤V
OUT
(S)
≤5.4V
5.5V
≤V
OUT
(S)
≤6.0V
∆V
OUT
1
1
V
OUT
(S) + 0.5 V
≤
V
IN
≤
10 V,
Line regulation 1
∆V
IN
•
V
OUT
I
OUT
= 30mA
∆V
OUT
2
1
V
OUT
(S) + 0.5 V
≤
V
IN
≤
10 V,
Line regulation 2
∆V
IN
•
V
OUT
I
OUT
= 10µA
∆V
OUT
3
Load regulation
V
IN
= V
OUT
(S) + 1 V,
10µA
≤
I
OUT
≤
80mA
∆V
OUT
1
V
IN
= V
OUT
(S) + 1 V, I
OUT
= 30mA
Output voltage temperature
*4)
∆Ta •
V
OUT
-40°C
≤
Ta
≤
85°C
coefficient
Current consumption during
I
SS
1
V
IN
= V
OUT
(S) + 1 V,
operation
ON/OFF pin = ON, no load
Current consumption when
I
SS
2
V
IN
= V
OUT
(S) + 1 V,
power off
ON/OFF pin = OFF, no load
Input voltage
V
IN
Power-off pin input voltage "H"
V
SH
V
IN
= V
OUT
(S) + 1 V, R
L
= 1kΩ,
V
OUT
(S) V
OUT
(S) V
OUT
(S) V
×0.98
×1.02
−
−
100
*5)
mA
−
−
150
*5)
mA
−
−
200
*5)
mA
−
−
250
*5)
mA
−
−
300
*5)
mA
−
0.51
0.87
V
−
0.38
0.61
V
−
0.30
0.44
V
−
0.24
0.33
V
−
0.20
0.26
V
−
0.18
0.22
V
−
0.17
0.21
V
−
0.17
0.20
V
0.05
0.2
%/V
0.05
30
±100
1.5
30
0.1
45
0.2
50
40
0.5
10
0.3
0.1
-0.1
%/V
mV
ppm
/°C
µA
µA
V
V
V
µA
µA
dB
Judged by V
OUT
output level.
Power-off pin input voltage "L"
Power-off pin input current "H"
Power-off pin input current "L"
Ripple rejection
V
SL
I
SH
I
SL
RR
V
IN
= V
OUT
(S) + 1 V, R
L
= 1kΩ,
Judged by V
OUT
output level.
V
IN
= V
OUT
(S) + 1 V,
ON/OFF = 7 V
V
IN
= V
OUT
(S) + 1 V,
ON/OFF = 0 V
V
IN
= V
OUT
(S) + 1 V, f = 100Hz,
∆Vrip
= 0.5 V p-p, I
OUT
=30mA
*1) V
OUT
(S)=Specified output voltage
V
OUT
(E)=Effective output voltage, i.e., the output voltage at fixet I
OUT
(=30 mA) and input V
OUT
(S)+1.0 V.
*2) Output current when the output voltage goes below 95% of V
OUT
(E) after gradually increasing output current.
*3) Vdrop = V
IN
1-(V
OUT
(E) × 0.98)
V
IN
1 = Input voltage when output voltage falls 98% of V
OUT
(E) after gradually decreasing input voltage.
*4) Output voltage shift by temperature [mV/°C] is calculated using the following equation.
∆V
OUT
∆V
OUT
[ppm/°C]
÷1000
[mV/°C] = V
OUT
(S)[V] ×
∆Ta
•
V
OUT
∆Ta
Specified output voltage
Output voltage shift by temperature
Output voltage temperature coefficient
*5) Peak output current can exceed the minimum value.
4
Seiko Instruments Inc.
Rev.1.2
Test Circuits
1.
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
2.
VIN
ON/OFF
Set to
power ON
VOUT
VSS
V
A
A
VIN
ON/OFF
Set to
V
IN
or GND
VOUT
VSS
3.
4.
VIN
ON/OFF
Set to
power ON
VOUT
VSS
A
V
A
VIN
ON/OFF
VOUT
VSS
V
R
L
5.
VIN
ON/ OFF
VOUT
VSS
V
R
L
Set to
power ON
Figure 4 Test Circuits
Standard Circuit
INPUT
VIN
C
IN
VOUT
C
L
OUTPUT
VSS
In addition to a tantalum capacitor, a ceramic
capacitor of 2
µF
or more can be used in CL.
C
IN
is a capacitor used to stabilize input. Use a
capacitor of 0.47
µF
or more.
Single GND
GND
Figure 5 Standard Circuit
Operating Conditions
Input capacitor (C
IN
)
Output capacitor (C
L
)
Equivalent Series Resistor (ESR)
Input Series Resistor (R
IN
)
: 0.47
µF
or more
: 2
µF
or more
: 10
Ω
or less
: 10
Ω
or less
Seiko Instruments Inc.
5
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