NCP4672
Dual Linear Voltage
Regulators with V
in
and V
out
Voltage Detector
The NCP4672 is a dual linear voltage regulator with input voltage
and output voltage detectors. This part is useful in systems where
multiple voltages are required such as for core and I/O. The NCP4672
is very accurate at 2% over full input voltage and full load current. The
NCP4672 eliminates the need for external voltage supervision due to
the two built in voltage detectors. The voltage detector on the input is
set to 7.0 V. The output voltage detector is for channel 1 and is set to
2.9 V. An external capacitor is used to set the duration of this reset
signal. Other features include short circuit protection and thermal
shutdown protection. The NCP4672 has been designed to work with a
4.7
mF
output capacitor having an ESR between 0.1
W
and 5.0
W.
Features
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MARKING
DIAGRAM
8
8
1
SOIC−8
NB SUFFIX
CASE 751
1
4672
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
4672
ALYW
G
•
•
•
•
•
•
•
•
•
•
•
Accuracy: 2% at Full Voltage and Load
Excellent Ripple Rejection: 70 dB @ 1 kHz
Voltage Detector for Input Voltage
Voltage Detector for Output Voltage
Programmable Delay of Reset Signal
Thermal Short Circuit Protection
This is a Pb−Free Device
PIN CONFIGURATION
V
in
Rst 1
V
out
Rst 2
C
D
3
V
in
4
(Top View)
8 V
out1
7 GND1
6 GND2
5 V
out2
Typical Application
Small Core and I/O Power
Consumer Equipment
Measurement Equipment
Industrial Equipment
V
in
RST
10 KW
ORDERING INFORMATION
V
in
Rst
V
out1
GND2
V
out2
V
out2
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
V
out1
C
out2
4.7
mF
Device
NCP4672DR2G
Package
SOIC−8
(Pb−Free)
Shipping
†
2500 Tape & Reel
V
out
Rst GND1
C
D
10 nF
V
in
V
in
V
in
C
in
0.1
mF
C
out2
4.7
mF
Figure 1. Typical Application Circuit
©
Semiconductor Components Industries, LLC, 2006
1
June, 2006 − Rev. 4
Publication Order Number:
NCP4672/D
NCP4672
MAXIMUM RATINGS
Rating
Input Voltage
Output Voltage
Output Current 1
Output Current 2
Output Short Circuit Duration
Power Dissipation and Thermal Characteristics − SOIC−8
Power Dissipation
Thermal Resistance, Junction−to−Ambient
Minimum Pad Size
200 mm
2
Pad Size (Note 1)
Thermal Resistance, Junction−to−Case
Operating Junction Temperature Range
Storage Temperature Range
Symbol
V
inmax
V
out
I
out1max
I
out2max
−
P
D
R
qJA
R
qJC
T
stg
T
solder
Value
−0.3 ~ 18
−0.3 to V
in
+ 0.3
30
80
Infinite
Internally Limited
190
160
25
−40 to 125
−55 to 150
Unit
V
V
mA
mA
−
W
°C/W
°C/W
°C/W
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to Figure 4 for more information.
PIN DESCRIPTION
Pin
Number
1
2
Symbol
V
in RST
V
o RST
Description
Open−collector, active−low output of the input voltage detector with hysteresis. Threshold levels are
typical 7.0 V/ 7.35 V at V
CC
pin.
Active−low output of the reset generator. Reset generator is based on sensing of the V
out1
voltage.
Sensing is with hysteresis − threshold levels are typically 2.9 V/ 2.95 V at V
out1
. Reset is generated at
rising edge of the V
out1
and it’s duration is set by external capacitor connected to C
D
pin.
Programmable delay of the reset generator. Delay is adjusted by inserting a capacitor between C
D
and
GND (typically 10 ms for 10 nF capacitor).
Supply Voltage
1.8 V/ 80 mA LDO Regulator Output
Ground for V
out2
(internally connected with GND1)
Ground for V
out1
(internally connected with GND2)
3.5 V/30 mA LDO Regulator Output
3
4
5
6
7
8
C
D
V
CC
V
out2
GND2
GND1
V
out1
RECOMMENDED CONDITIONS
(T
A
= 25°C, C
in
= 0.1
mF
Ceramic, C
out
= 4.7
mF)
Characteristics
Input Voltage
Output Current (where V
out
remains within accuracy)
Symbol
V
in
I
out1
I
out2
Min
3.8
0
0
Typ
12
−
−
Max
16
20
70
Unit
V
mA
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2
NCP4672
V
in
V
In RST
7.0 V
+
−
2.9 V
−
+
V
ref
V
o RST
V
out1
+
−
V
ref
V
ref
C
D
V
ref
Thermal
Shutdown
V
out2
−
+
GND1
GND2
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3
−
+
V
ref
Thermal
Shutdown
Figure 1.
NCP4672
ELECTRICAL CHARACTERISTICS
(C
in
= 0.1
mF
Ceramic, C
out
= 4.7
mF
with ESR = 0.1 − 5.0
W,
V
in
= 12 V, T
A
= 25°C)
Characteristics
Output Voltage
V
out1
(V
in
= 4.5 V, I
out1
= 20 mA)
V
out2
(V
in
= 4.5 V, I
out2
= 40 mA)
Line Regulation
V
out1
(V
in
= 4.5 V , I
out1
= 20 mA)
V
out2
(V
in
= 4.5 V to 10 V, I
out2
= 40 mA)
Load Regulation
V
out1
(V
in
= 4.5 V, I
out1
= 0.1 mA to 20 mA)
V
out2
(V
in
= 4.5 V, I
out2
= 0.1 mA to 70 mA)
Dropout Voltage
V
out1
(V
in
= 3.3 V, I
out1
= 20 mA)
Ground Pin Current
(V
in
= 8.0 V, I
out1
= I
out2
= 0 mA)
(V
in
= 2.7 V, I
out1
= I
out2
= 0 mA, Rpu = infinite)
Short Current Limit
V
out1
V
out2
Thermal Shutdown
Temperature Coefficient
V
out1
(T
J
= −30 to 85°C, V
in
= 4.5 V, I
out1
= 20 mA)
V
out2
(T
J
= −30 to 85°C, V
in
= 4.5 V, I
out2
= 40 mA)
Ripple Rejection (Note 6)
V
out1
(V
in
= 4.5 V, V
ripple
= 1.0 V, I
out1
= 20 mA, 120 Hz)
V
out2
(V
in
= 4.5 V, V
ripple
= 1.0 V, I
out2
= 40 mA, 120 Hz)
Output Noise Voltage
V
out1
(V
in
= 4.5 V, f = 20 Hz − 80 kHz, I
out1
= 20 mA)
V
out2
(V
in
= 4.5 V, f = 20 Hz − 80 kHz, I
out2
= 40 mA)
V
in
Detect
Detecting Voltage L (V
in
= H to L)
Detecting Voltage H (V
in
= L to H)
Hysteresis Voltage (V
in
= H to L to H)
V
SLin
Temperature Coefficient (T
J
= −30°C to +85°C)
Low−Level Output Voltage (V
in
= 6.0 V, Vt1 = 5.0 V, Rt1 = 10 kW) (Note 5)
Threshold Operating Voltage (V
OPLin
= Vt1 = 1.0 V)
V
out
Detect
Detecting Voltage L (V
in
= H to L)
Detecting Voltage H (V
in
= L to H)
Hysteresis Voltage (V
in
= H to L to H)
V
SLin
Temperature Coefficient (T
J
= −30°C to +85°C)
Low−Level Output Voltage (V
out1
= 2.6 V)
Threshold Operating Voltage (V
OPLout
= 0.85 V)
Reset Delay Time (C
D
= 10 nF)
“L” Transmission Delay Time (C
D
= 10 nF)
V
SLout
V
SHout
D
V
Sout
V
SLin
T
C
V
OLout1
V
OLout2
t
PLH
t
PHL
2.78
−
25
−
−
−
5
−
2.9
2.95
50
100
100
−
10
30
3.020
−
100
−
200
0.4
15
90
V
V
mV
ppm/°C
mV
V
ms
ms
V
SLin
V
SHin
D
V
Sin
V
Slin
T
C
V
OLin1
V
OLin2
6.72
−
140
−
−
−
7.0
7.35
350
100
100
−
7.28
−
560
−
200
0.4
V
V
mV
ppm/°C
mV
V
T
C
−
−
R
R
−
−
V
n
−
−
80
50
−
−
65
70
−
−
mV
rms
100
100
−
−
dB
Symbol
V
adj
3.43
1.764
Reg
line
−
−
Reg
load
−
−
V
in
− V
out1
−
I
GND
−
−
I
SC
30
80
−
60
150
165
−
−
−
°C
ppm/°C
1.0
3.0
2.0
−
mA
150
300
mA
3.0
2.0
40
40
mV
3.0
3.0
30
30
mV
3.5
1.8
3.57
1.836
mV
Min
Typ
Max
Unit
V
2. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V.
T
*
TA
3. The maximum package power dissipation is: PD
+
J(max)
R
qJA
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Refer to Figure 3.
6. Guaranteed by design.
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4
NCP4672
V
SHin
V
OPLin
*
Vi
(Pin4)
DV
Sin
V
SLin
V
OPLin
*
V
in RST
(Pin1)
V
SHout
V
out1
(Pin8)
V
OPLout
*
DV
Sout
V
SLout
V
OPLout
*
V
o RST
(Pin2)
t
PLH
t
PHL
t
PLH
*; V
OPLout
shows theoretical on this chart.
V
OPLout
spec. must be specified on Pin 2 voltage (0.4 V)
*; V
OPLin
shows theoretical on this chart.
V
OPLin
spec. must be specified on Pin 1 voltage (0.4 V)
Figure 2. Dual Regulator Timing
V
in RST
1
10 kW
V
in
4
V
OPLin
= 1.0 V
typ
V
OLin
= 0.4 V
+
−
+
−
7.0 V
Vt1
V
typ
= 5.0 V
V
max
= 16 V
GND1
7
Figure 3. Threshold Operating Voltage V
OPLin
Under Condition V
OLin
= 0.4 V
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