CP2400/1/ 2/3
12 8/ 64 S
E G M E N T
LCD D
R I V E R
LCD Driver
Controls
Digital Bus Interface
4-wire
up to 128 segments (48-pin packages) or
64 segments (32-pin package)
Supports static, 2-mux, 3-mux, and 4-mux displays
On-chip bias generation with internal charge pump
Low power blink capability
SPI Interface operates up to 2.5 Mbps with
synchronous external clock or up to 1 Mbps with internal
clock (CP2400/2 only).
GPIO Expander
GPIO count by up to 36 pins (48-pin
packages) or 20 pins (32-pin package)
GPIO pins may be configured to push-pull or open-drain
outputs with two drive levels. GPIO may also be used as
digital inputs (CP2400/1/2/3 pullups included)
Port Match Capability can wake up host controller using
interrupt pin
5 V Tolerant I/O
Expands
SMBus/I
2
C Interface operates up to 400 kHz with
internal clock (CP2401/3 only).
Dedicated RST and INT pins.
Optional CLK pin can be used as a CMOS clock input.
2-wire
Optional
PWR pin (SMBus/I
2
C devices only) places the
device in a low power mode. SPI devices use the NSS
pin to place the device in a low power mode.
Low Power
V operation with integrated LDO
Ultra Low Power Mode w/ LCD (<3
μA
typical)
Shutdown current (0.05
μA
typical)
1.8–3.6
Real Time Clock, SmaRTClock
time keeping with 32.768 kHz watch crystal;
self-oscillate mode requires no external crystal; accepts
external 32 kHz CMOS clock
36-hour programmable counter with wake up alarm
Can wake up the host controller using interrupt pin
Low power (<1.5
μA)
Precision
Example Applications
Handheld
Equipment
Utility Meters
Thermostat Display
Home Security Systems
Packages
Pb-free
256 Bytes RAM
General
purpose RAM expands the memory available to
host controller.
general purpose 16-bit timers
48-pin QFP (9x9 mm footprint) [-Q]
Pb-free 48-pin QFN (7x7 mm footprint) [-M]
Pb-free 32-pin QFN (5x5 mm footprint)
16-bit Timers
Two
Ordering Part Numbers
CP2400-G[M|Q]
CP2401-G[M|Q]
(SPI Interface)
Clock Sources
20
MHz Internal oscillator
Can be clocked from an external CMOS clock
(SMBus/I
2
C Interface)
CP2402-GM (SPI Interface)
CP2403-GM
(SMBus/I
2
C Interface)
Temperature Range: –40 to +85 °C
Rev. 1.0 8/10
Copyright © 2010 by Silicon Laboratories
CP2400/1/2/3
CP2400 /1 /2/3
T
A B L E
Section
OF
C
ONTENTS
Page
1. System Overview .................................................................................................................5
1.1. Typical Connection Diagram ..........................................................................................9
2. Absolute Maximum Ratings..............................................................................................11
3. Electrical Characteristics ..................................................................................................12
4. Pinout and Package Definitions .......................................................................................17
5. Clocking Options ...............................................................................................................32
6. Internal Registers and Memory ........................................................................................34
6.1. Accessing Internal Registers and RAM over the SPI Interface ....................................35
6.2. Accessing Internal Registers and RAM over the SMBus Interface ..............................36
6.3. Internal Registers .........................................................................................................37
7. Interrupt Sources ...............................................................................................................40
8. Reset Sources ....................................................................................................................47
8.1. Reset Initialization ........................................................................................................47
8.2. Power-On Reset...........................................................................................................48
8.3. External Pin Reset........................................................................................................48
9. Power Modes......................................................................................................................49
9.1. Normal Mode................................................................................................................50
9.2. RAM Preservation Mode ..............................................................................................50
9.3. Ultra Low Power LCD Mode.........................................................................................51
9.4. Ultra Low Power SmaRTClock Mode...........................................................................52
9.5. Shutdown Mode ...........................................................................................................53
9.6. Determining the ULP Mode Wake-Up Source..............................................................55
9.7. Port Match Functionality in the Ultra Low Power Modes..............................................56
9.8. Disabling Secondary Device Functions........................................................................58
10. Port Input/Output ...............................................................................................................60
10.1.Port I/O Modes of Operation ........................................................................................61
10.2.Assigning Port I/O Pins to Analog and Digital Functions .............................................62
10.3.Active Mode Port Match...............................................................................................63
10.4.Registers for Accessing and Configuring Port I/O .......................................................65
11. SmaRTClock (Real Time Clock)........................................................................................69
11.1.SmaRTClock Interface.................................................................................................70
11.2.SmaRTClock Clocking Sources...................................................................................74
11.3.SmaRTClock Timer and Alarm Function .....................................................................77
12. LCD Segment Driver ..........................................................................................................83
12.1.Initializing the LCD Segment Driver .............................................................................83
12.2.LCD Configuration .......................................................................................................84
12.3.LCD Bias Generation and Contrast Adjustment ..........................................................85
12.4.LCD Timing Generation ...............................................................................................87
12.5.Mapping ULP Memory to LCD Pins .............................................................................90
12.6.Blinking LCD Segments ...............................................................................................91
13. Timers .................................................................................................................................92
Rev. 1.0
3
CP2 400/1/2/3
13.1.Timer 0 .......................................................................................................................92
13.2.Timer 1 .......................................................................................................................96
14. Serial Peripheral Interface (SPI) .....................................................................................101
14.1.Signal Descriptions ....................................................................................................101
14.2.Serial Clock Timing ....................................................................................................102
15. SMBus Interface...............................................................................................................104
15.1.Supporting Documents ..............................................................................................104
15.2.SMBus Configuration .................................................................................................104
15.3.SMBus Operation.......................................................................................................105
Document Change List ........................................................................................................108
4
Rev. 1.0
CP2400 /1 /2/3
1.
System Overview
CP2400/1/2/3 devices are fixed function LCD drivers that can also be used for expanding GPIO, timekeeping, and
increasing available system RAM by up to 256 bytes. The device is controlled using direct and indirect internal
registers accessible through the 4-wire SPI or 2-wire SMBus interface. All digital pins on the device are 5 V
tolerant.
Figure 1.1. CP2400 Block Diagram
Rev. 1.0
5
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