DATASHEET
ISL23318
Single, 128-taps Low Voltage Digitally Controlled Potentiometer (XDCP™)
The ISL23318 is a volatile, low voltage, low noise, low power,
I
2
C Bus™, 128 Taps, single digitally controlled potentiometer
(DCP), which integrates DCP core, wiper switches and control
logic on a monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I
2
C bus interface. The potentiometer has an associated
volatile Wiper Register (WR) that can be directly written to and
read by the user. The contents of the WR controls the position
of the wiper. When powered on, the ISL23318’s wiper will
always commence at mid-scale (64 tap position).
The low voltage, low power consumption, and small package
of the ISL23318 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23318 has a V
LOGIC
pin allowing down to 1.2V bus operation, independent from the
V
CC
value. This allows for low logic levels to be connected
directly to the ISL23318 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal
processing.
FN7887
Rev 0.00
July 26, 2011
Features
• 128 resistor taps
• I
2
C serial interface
- No additional level translator for low bus supply
- Two address pins allow up to four devices per bus
• Power supply
- V
CC
= 1.7V to 5.5V analog power supply
- V
LOGIC
= 1.2V to 5.5V I
2
C bus/logic power supply
• Wiper resistance: 70Ω typical @ V
CC
= 3.3V
• Shutdown Mode - forces the DCP into an end-to-end open
circuit and R
W
is shorted to R
L
internally
• Power-on preset to mid-scale (64 tap position)
• Shutdown and standby current <2.8µA max
• DCP terminal voltage from 0V to V
CC
• 10kΩ 50kΩor 100kΩ total resistance
• Extended industrial temperature range: -40
°
C to +125
°
C
• 10 Ld MSOP or 10 Ld UTQFN packages
• Pb-free (RoHS compliant)
Applications
• Gain adjustment in battery powered instruments
• Trimming sensor circuits
• Power supply margining
• RF power amplifier bias compensation
10000
V
REF
8000
RESISTANCE (Ω)
RH
-
V
REF_M
6000
4000
ISL23318
RW
+
ISL28114
2000
RL
0
0
32
64
TAP POSITION (DECIMAL)
96
128
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10k DCP
FIGURE 2. V
REF
ADJUSTMENT
FN7887 Rev 0.00
July 26, 2011
Page 1 of 19
ISL23318
Block Diagram
V
LOGIC
V
CC
SCL
SDA
A1
A0
I/O
BLOCK
LEVEL
SHIFTER
POWER-UP
INTERFACE,
CONTROL
AND
STATUS
LOGIC
R
H
WR
VOLATILE
REGISTER
AND
WIPER
CONTROL
CIRCUITRY
R
L
R
W
GND
Pin Configurations
ISL23318
(10 LD MSOP)
TOP VIEW
V
LOGIC
SCL
SDA
A0
A1
1
2
3
4
5
10
9
8
7
6
GND
V
CC
RH
RW
RL
Pin Descriptions
MSOP
1
2
3
4
UTQFN
10
1
2
3
SYMBOL
V
LOGIC
SCL
SDA
A0
DESCRIPTION
I
2
C bus /logic supply. Range 1.2V to
5.5V
Logic Pin - Serial bus clock input
Logic Pin - Serial bus data
input/open drain output
Logic Pin - Hardwire slave address
pin for I
2
C serial bus.
Range: V
LOGIC
or GND
Logic Pin - Hardwire slave address
pin for I
2
C serial bus.
Range: V
LOGIC
or GND
DCP “low” terminal
DCP wiper terminal
DCP “high” terminal
Analog power supply.
Range 1.7V to 5.5V
Ground pin
5
4
A1
ISL23318
(10 LD UTQFN)
TOP VIEW
10 V
LOGIC
6
7
8
9
8
7
6
GND
V
CC
RH
RW
5
6
7
8
9
RL
RW
RH
V
CC
GND
SCL
SDA
A0
A1
1
2
3
4
RL 5
9
10
FN7887 Rev 0.00
July 26, 2011
Page 2 of 19
ISL23318
Ordering Information
PART NUMBER
(Note 5)
ISL23318TFUZ (Notes 1, 3)
ISL23318UFUZ (Notes 1, 3)
ISL23318WFUZ (Notes 1, 3)
PART MARKING
3318T
3318U
3318W
RESISTANCE
OPTION
(kΩ)
100
50
10
100
100
50
50
10
10
TEMP RANGE
(°C)
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
PACKAGE
(Pb-free)
10 Ld MSOP
10 Ld MSOP
10 Ld MSOP
10 Ld 2.1x1.6 UTQFN
10 Ld 2.1x1.6 UTQFN
10 Ld 2.1x1.6 UTQFN
10 Ld 2.1x1.6 UTQFN
10 Ld 2.1x1.6 UTQFN
10 Ld 2.1x1.6 UTQFN
PKG.
DWG. #
M10.118
M10.118
M10.118
L10.2.1x1.6A
L10.2.1x1.6A
L10.2.1x1.6A
L10.2.1x1.6A
L10.2.1x1.6A
L10.2.1x1.6A
ISL23318TFRUZ-T7A (Notes 2, 4) HH
ISL23318TFRUZ-TK (Notes 2, 4)
HH
ISL23318UFRUZ-T7A (Notes 2, 4) HG
ISL23318UFRUZ-TK (Notes 2, 4)
HG
ISL23318WFRUZ-T7A (Notes 2, 4) HF
ISL23318WFRUZ-TK (Notes 2, 4) HF
NOTES:
1. Add "-TK" or "-T7A" suffix for Tape and Reel option. Please refer to
TB347
for details on reel specifications.
2. Please refer to
TB347
for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate-e4
termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5. For Moisture Sensitivity Level (MSL), please see device information page for
ISL23318.
For more information on MSL please see techbrief
TB363.
FN7887 Rev 0.00
July 26, 2011
Page 3 of 19
ISL23318
Absolute Maximum Ratings
Supply Voltage Range
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
V
LOGIC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Voltage on Any DCP Terminal Pin . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Voltage on Any Digital Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Wiper current I
W
(10s)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . .6.5kV
CDM Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . . . . . . . . 1kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . 100mA @ +125°C
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
10 Ld MSOP Package (Notes 6, 7) . . . . . . .
170
70
10 Ld UTQFN Package (Notes 6, 7) . . . . . .
145
90
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
V
CC
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7V to 5.5V
V
LOGIC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2V to 5.5V
DCP Terminal Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to V
CC
Max Wiper Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
7. For
JC
, the “case temp” location is the center top of the package.
Analog Specifications
SYMBOL
R
TOTAL
V
CC
= 2.7V to 5.5V, V
LOGIC
= 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C.
PARAMETER
R
H
to R
L
Resistance
W option
U option
T option
R
H
to R
L
Resistance Tolerance
End-to-End Temperature Coefficient
W option
U option
T option
V
RH
, V
RL
R
W
DCP Terminal Voltage
Wiper Resistance
V
RH
or V
RL
to GND
R
H
- floating, V
RL
= 0V, force I
W
current
to the wiper,
I
W
= (V
CC
- V
RL
)/R
TOTAL,
V
CC
= 2.7V to 5.5V
V
CC
= 1.7V
C
H
/C
L
/C
W
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
10
50
100
MAX
(Note 20)
UNITS
kΩ
kΩ
kΩ
-20
±2
175
85
70
+20
%
ppm/°C
ppm/°C
ppm/°C
0
70
V
CC
200
V
Ω
580
32
-0.4
<0.1
16
49
61
-65
-75
0.4
Ω
pF
µA
nV/√Hz
nV/√Hz
nV/√Hz
dB
dB
Terminal Capacitance
Leakage on DCP Pins
Resistor Noise Density
See “DCP Macro Model” on page 8
Voltage at pin from GND to V
CC
Wiper at middle point, W option
Wiper at middle point, U option
Wiper at middle point, T option
I
LkgDCP
Noise
Feed Thru
PSRR
Digital Feed-Through from Bus to Wiper Wiper at middle point
Power Supply Reject Ratio
Wiper output change if V
CC
change
±10%; wiper at middle point
FN7887 Rev 0.00
July 26, 2011
Page 4 of 19
ISL23318
Analog Specifications
SYMBOL
V
CC
= 2.7V to 5.5V, V
LOGIC
= 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C.
(Continued)
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
VOLTAGE DIVIDER MODE (0V @ RL; V
CC
@ RH; measured at RW, unloaded)
INL
(Note 13)
DNL
(Note 12)
FSerror
(Note 11)
Integral Non-linearity, Guaranteed
Monotonic
Differential Non-linearity, Guaranteed
Monotonic
Full-scale Error
W, U, T options
W, U, T options
W option
U, T option
ZSerror
(Note 10)
Zero-scale Error
W option
U, T option
TC
V
Ratiometric Temperature Coefficient
(Notes 14)
W option, Wiper Register set to 40 hex
U option, Wiper Register set to 40 hex
T option, Wiper Register set to 40 hex
Large Signal Wiper Settling Time
f
cutoff
-3dB Cutoff Frequency
From code 0 to 7F hex
Wiper at middle point W option
Wiper at middle point U option
Wiper at middle point T option
-0.5
-0.5
-2.5
-1.0
0
0
±0.15
±0.15
-1.5
-0.7
1.5
0.7
8
4
2.3
300
1200
250
120
+0.5
+0.5
0
0
2.5
1.0
LSB
(Note 9)
LSB
(Note 9)
LSB
(Note 9)
LSB
(Note 9)
LSB
(Note 9)
LSB
(Note 9)
ppm/°C
ppm/°C
ppm/°C
ns
kHz
kHz
kHz
RHEOSTAT MODE (Measurements between RW and RL pins with RH not connected, or between RW and RH with RL not connected)
R
INL
(Note 18)
Integral Non-linearity, Guaranteed
Monotonic
W option; V
CC
= 2.7V to 5.5V
W option; V
CC
= 1.7V
U, T option; V
CC
= 2.7V to 5.5V
U, T option; V
CC
= 1.7V
R
DNL
(Note 17)
Differential Non-linearity, Guaranteed
Monotonic
W option; V
CC
= 2.7V to 5.5V
W option; V
CC
= 1.7V
U, T option; V
CC
= 2.7V to 5.5V
U, T option; V
CC
= 1.7V
R
offset
(Note 16)
Offset, Wiper at 0 Position
W option; V
CC
= 2.7V to 5.5V
W option; V
CC
= 1.7V
U, T option; V
CC
= 2.7V to 5.5V
U, T option; V
CC
= 1.7V
0
0
-0.5
-0.5
-0.5
-1.0
±0.5
±3.0
±0.15
±1.0
±0.15
±0.4
±0.15
±0.4
1.8
3.0
0.3
0.5
1
3.0
+0.5
+0.5
+0.5
+1.0
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
MI
(Note 15)
FN7887 Rev 0.00
July 26, 2011
Page 5 of 19
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