CY62148GN MoBL
®
4-Mbit (512K × 8) Static RAM
4-Mbit (512K × 8) Static RAM
Features
■
■
■
Functional Description
The CY62148GN is a high-performance CMOS static RAM
organized as 512K words by 8-bits. This device features
advanced circuit design to provide ultra low standby current. This
is ideal for providing More Battery Life™ (MoBL
) in portable
applications. The device also has an automatic power-down
feature that significantly reduces power consumption when
addresses are not toggling. Placing the device in standby mode
reduces power consumption by more than 99% when deselected
(CE HIGH). The eight input and output pins (I/O
0
through I/O
7
)
are placed in a high-impedance state when the device is
deselected (CE HIGH), Outputs are disabled (OE HIGH), or
during an active Write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight I/O pins (I/O
0
through I/O
7
)
is then written into the location specified on the address pins (A
0
through A
18
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appear on the I/O pins.
For a complete list of related documentation,
click here.
Very high speed: 45 ns
Wide voltage range: 2.2 V to 3.6 V, 4.5 V to 5.5 V
Ultra low standby power
❐
Typical standby current: 3.5 µA
❐
Maximum standby current: 8.7 µA
Easy memory expansion with CE and OE features
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Available in Pb-free 32-pin thin small outline package (TSOP) II
and 32-pin small-outline integrated circuit (SOIC) packages
■
■
■
■
Logic Block Diagram
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
CE
WE
OE
INPUT BUFFER
ROW DECODER
I/O
IO0
0
I/O
IO1
1
SENSE AMPS
I/O
IO2
2
I/O
IO3
3
I/O
IO4
4
I/O
IO5
5
I/O
IO6
6
I/O
512K x 8
ARRAY
COLUMN DECODER
POWER
DOWN
IO7
7
A13
A14
A15
A16
A17
A18
Cypress Semiconductor Corporation
Document Number: 001-95418 Rev. *D
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised December 21, 2017
CY62148GN MoBL
®
Contents
Pin Configurations ........................................................... 3
Product Portfolio .............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 10
Ordering Information ...................................................... 11
Ordering Code Definitions ......................................... 11
Package Diagrams .......................................................... 12
Acronyms ........................................................................ 13
Document Conventions ................................................. 13
Units of Measure ....................................................... 13
Document History Page ................................................. 14
Sales, Solutions, and Legal Information ...................... 15
Worldwide Sales and Design Support ....................... 15
Products .................................................................... 15
PSoC® Solutions ...................................................... 15
Cypress Developer Community ................................. 15
Technical Support ..................................................... 15
Document Number: 001-95418 Rev. *D
Page 2 of 15
CY62148GN MoBL
®
Pin Configurations
Figure 1. 32-pin SOIC/TSOP II pinout
Top View
A
17
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A
15
A
18
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
Product Portfolio
Power Dissipation
Product
Range
V
CC
Range (V)
Speed
(ns)
45
Operating I
CC
(mA)
f = 1 MHz
Typ
[1]
CY62148GN30
CY62148GN
Industrial
2.2 V–3.6 V
4.5 V–5.5 V
–
Max
6
f = f
max
Typ
[1]
–
Max
20
Standby I
SB2
(µA)
Typ
[1]
3.5
Max
8.7
Note
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
Document Number: 001-95418 Rev. *D
Page 3 of 15
CY62148GN MoBL
®
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature
with power applied .................................. –55 °C to + 125 °C
Supply voltage to ground potential ......–0.5 V to Vcc + 0.5 V
DC voltage applied to outputs
in high Z state
[2, 3]
................................–0.5 V to Vcc + 0.5 V
DC input voltage
[2, 3]
............................–0.5 V to Vcc + 0.5 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(per MIL-STD-883, Method 3015) .......................... > 2001 V
Latch-up current .................................................... > 140 mA
Operating Range
Device
CY62148GN
Range
Industrial
Ambient
Temperature
V
CC
[4]
–40 °C to +85 °C 2.2 V to 3.6 V,
4.5 V to 5.5 V
Electrical Characteristics
Over the operating range
Parameter
V
OH
Description
Output HIGH
voltage
Test Conditions
45 ns
Min
2
2.4
2.4
V
CC
– 0.5
[6]
–
–
–
1.8
2
2.2
–0.3
[2]
–0.3
[2]
–0.5
–1
–1
–
–
–
V
CC
= V
CC(max)
,
I
OUT
= 0 mA
CMOS levels
Typ
[5]
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
3.5
Max
–
–
–
–
0.4
0.4
0.4
V
CC
+ 0.3
[3]
V
CC
+ 0.3
[3]
V
CC
+ 0.5
0.6
0.8
0.8
+1
+1
20
6
8.7
µA
µA
µA
mA
V
V
V
Unit
V
2.2 V to 2.7 V V
CC
= Min, I
OH
= –0.1 mA
2.7 V to 3.6 V V
CC
= Min, I
OH
= –1.0 mA
4.5 V to 5.5 V V
CC
= Min, I
OH
= –1.0 mA
4.5 V to 5.5 V V
CC
= Min, I
OH
= –0.1 mA
V
OL
Output LOW
voltage
2.2 V to 2.7 V V
CC
= Min, I
OL
= 0.1 mA
2.7 V to 3.6 V V
CC
= Min, I
OL
= 2.1 mA
4.5 V to 5.5 V V
CC
= Min, I
OL
= 2.1 mA
2.2 V to 2.7 V –
2.7 V to 3.6 V –
4.5 V to 5.5 V –
2.2 V to 2.7 V –
2.7 V to 3.6 V –
4.5 V to 5.5 V –
GND < V
I
< V
CC
GND < V
O
< V
CC
, output disabled
f = f
max
= 1/t
RC
f = 1 MHz
V
IH
Input HIGH
voltage
V
IL
Input LOW
voltage
I
IX
I
OZ
I
CC
I
SB1[7]
Input leakage current
Output leakage current
V
CC
operating supply current
Automatic CE power-down
current – CMOS inputs
CE > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = f
max
(address and data only),
f = 0 (OE and WE) V
CC
= V
CC(max)
I
SB2[7]
Automatic CE power-down
current – CMOS inputs
CE > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0, V
CC
= V
CC(max)
–
3.5
8.7
µA
Notes
2. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
3. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
4. Full device AC operation assumes a minimum of 100 µs ramp time from 0 to V
CC(min)
and 200 µs wait time after V
CC
stabilization.
5. Typical values are included for reference and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
6. This parameter is guaranteed by design and not tested.
7. Chip enable (CE) must be HIGH at CMOS level to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
Document Number: 001-95418 Rev. *D
Page 4 of 15
CY62148GN MoBL
®
Capacitance
Parameter
[8]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(Typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
[8]
JA
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Still air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
32-pin SOIC
Package
51.79
25.12
32-pin TSOP II Unit
Package
79.03
17.44
C/W
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms
[9]
V
CC
OUTPUT
R1
3.0 V
30 pF
INCLUDING
JIG AND
SCOPE
R2
GND
Rise Time = 1 V/ns
10%
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Equivalent to:
THEVENIN
EQUIVALENT
OUTPUT
R
TH
V
Parameter
[8]
R1
R2
R
TH
V
TH
2.5 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
5.0 V
1800
990
639
1.77
Unit
V
Notes
8. Tested initially and after any design or process changes that may affect these parameters.
9. Full-device operation requires linear V
CC
ramp from VDR to V
CC(min)
> 100 µs or stable at V
CC(min)
> 100 µs.
Document Number: 001-95418 Rev. *D
Page 5 of 15
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