EL5001
6-Channel Clock Driver
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DATASHEET
FN7376
Rev 2.00
January 31, 2005
The EL5001 is a 6-channel level shifting driver designed
primarily for use as a clock driver in LTPS LCD displays. The
EL5001 buffers and level shifts six logic level input signals.
The six channels are grouped in to two sets, one of two
channels and one of four channels. Each set can be
configured in the inverting or non-inverting modes.
Operating from 3.3V input logic, the output swing is set using
two reference input pins. These pins can be up to 18V
differential and are not buffered, so should therefore be
bypassed effectively.
The EL5001 is designed to drive capacitive loads of 500pF
with rise and fall times of just 20ns. A three-state pin is
provided to set all outputs in to a high impedance mode. The
ENABLE pin can be used to put the device in to a power
save mode where the power consumption drops to just 3µA.
The EL5001 is available in 20-pin QFN (4mm x 4mm) and
HTSSOP packages. Both are specified for operation over
the -40°C to +85°C temperature range.
Features
• SIx inverting/non-inverting channels
• 3.3V input logic
• 18V output
• 250µA typical supply current
• Drives up to 500pF
• T
R
/T
F
= 35ns max
• Disable function
• 20-pin QFN (4mm x 4mm) and HTSSOP packages
• Pb-free available (RoHS compliant)
Applications
• LTPS LCD clock drivers
• CCD driving
• Level shifters
Ordering Information
PART NUMBER
EL5001IL
EL5001IL-T7
EL5001IL-T13
EL5001ILZ
(See Note)
EL5001ILZ-T7
(See Note)
EL5001ILZ-T13
(See Note)
PACKAGE
20-Pin QFN
(4mm x 4mm)
20-Pin QFN
(4mm x 4mm)
20-Pin QFN
(4mm x 4mm)
20-Pin QFN
(4mm x 4mm)
(Pb-Free)
20-Pin QFN
(4mm x 4mm)
(Pb-Free)
20-Pin QFN
(4mm x 4mm)
(Pb-Free)
TAPE &
REEL
-
7”
13”
-
PKG. DWG. #
MDP0046
MDP0046
MDP0046
MDP0046
PART NUMBER
EL5001IRE
EL5001IRE-T7
EL5001IRE-T13
EL5001IREZ
(See Note)
EL5001IREZ-T7
(See Note)
EL5001IREZ-T13
(See Note)
PACKAGE
20-Pin
HTSSOP
20-Pin
HTSSOP
20-Pin
HTSSOP
20-Pin
HTSSOP
(Pb-Free)
20-Pin
HTSSOP
(Pb-Free)
20-Pin
HTSSOP
(Pb-Free)
TAPE &
REEL
-
7”
13”
-
PKG. DWG. #
MDP0048
MDP0048
MDP0048
MDP0048
7”
MDP0046
7”
MDP0048
13”
MDP0046
13”
MDP0048
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination
finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-
free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
FN7376 Rev 2.00
January 31, 2005
Page 1 of 8
EL5001
Pinouts
EL5001
[20-PIN QFN (4MM X 4MM)]
TOP VIEW
18 GND
19 TRI
EL5001
(20-PIN HSSOP)
TOP VIEW
TRI 1
EN 2
20 GND
19 VH
18 OUT1
17 OUT2
THERMAL
PAD
16 OUT3
15 OUT4
14 OUT5
13 OUT6
12 VL
11 NC
IN1 1
IN2 2
IN3 3
IN4 4
IN5 5
OUT6 10
IN6 6
INV1 7
INV2 8
VL 9
THERMAL
PAD
16 NC
15 OUT1
14 OUT2
13 OUT3
12 OUT4
11 OUT5
20 EN
17 VH
IN1 3
IN2 4
IN3 5
IN4 6
IN5 7
IN6 8
INV1 9
INV2 10
FN7376 Rev 2.00
January 31, 2005
Page 2 of 8
EL5001
Absolute Maximum Ratings
(T
A
= 25°C)
Supply Voltage between V
SD
and GND . . . . . . . . . . . . . . . . . . .18V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
PARAMETER
POWER SUPPLY
I
S
Supply Current
V
H
= 10V, V
L
= -5V, EN = 3V, unless otherwise specified.
CONDITION
MIN
TYP
MAX
UNIT
DESCRIPTION
EN = 3V, IN
X
= 0V
EN = 3V, IN
X
= 3V
750
250
3
-13
5
0
1200
500
µA
µA
µA
I
S_DIS
V
LR
V
HR
V
H
-V
L
INPUT
V
IH
I
IH
V
IL
I
IL
C
IN
R
IN
OUTPUT
V
OH
V
OL
R
OH
R
OL
I
PEAK
I
L
Supply Current - Disabled
V
L
Range
V
H
Range
Maximum V
H
- V
L
Range
EN = 0V, IN
X
= 0V
0
18
18
V
V
V
Logic ‘1’ Input Voltage
Logic ‘1’ Input Current
Logic ‘0’ Input Voltage
Logic ‘0’ Input Current
Input Capacitance
Input Resistance
2.0
0.1
10
0.8
0.1
3.5
50
10
V
µA
V
µA
pF
M
V
OUTL
High
V
OUTL
Low
On Resistance V
H
to OUT
On Resistance V
L
to OUT
Peak Output Current
Out Leakage Current
IN
X
= 10V, I
L
= 10mA
IN
X
= 0V, I
L
= -10mA
I
L
= 50mA
I
L
= 50mA
9.80
9.88
-4.90
11
11
500
0.1
0.5
-4.88
15
15
V
V
mA
µA
SWITCHING CHARACTERISTICS
t
R
t
F
t
RFD
t
D
+
t
D
-
t
DD
t
EN
t
DIS
Rise Time
Fall Time
T
R
, T
F
Matching
Turn On Delay
Turn Off Delay
t
D
+, t
D
-, Matching
Enable Time
Disable Time
C
L
= 500pF
C
L
= 500pF
C
L
= 500pF
C
L
= 500pF
C
L
= 500pF
C
L
= 500pF
9.8
2.2
20
20
5
55
55
5
35
35
ns
ns
ns
ns
ns
ns
µs
µs
FN7376 Rev 2.00
January 31, 2005
Page 3 of 8
EL5001
Typical Performance Curves
VOLTAGE (1V/DIV)
TIME (40ns/DIV)
VOLTAGE (1V/DIV)
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
RISE TIME
T=37.55ns
FALL TIME
T=29ns
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
TIME (40ns/DIV)
FIGURE 1. RISE TIME OUTPUT 6V
P-P
FIGURE 2. FALL TIME OUTPUT 6V
P-P
VOLTAGE (2V/DIV)
TIME (20ns/DIV)
VOLTAGE (2V/DIV)
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
RISE TIME
T=23.63ns
FALL TIME
T=22.93ns
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
TIME (20ns/DIV)
FIGURE 3. RISE TIME OUTPUT 12V
P-P
FIGURE 4. FALL TIME OUTPUT 12V
P-P
VOLTAGE (2V/DIV)
RISE TIME
T=40.08ns
VOLTAGE (2V/DIV)
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
FALL TIME
T=30.57ns
TIME (20ns/DIV)
TIME (20ns/DIV)
FIGURE 5. RISE TIME OUTPUT 5V
P-P
FIGURE 6. FALL TIME OUTPUT 5V
P-P
FN7376 Rev 2.00
January 31, 2005
Page 4 of 8
EL5001
Typical Performance Curves
(Continued)
CH2
VOLTAGE (1V/DIV)
VOLTAGE (1V/DIV)
CH2
ENABLE
T=9.8µs
DISABLE
T=2.2µs
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
TIME (10µs/DIV)
CH3
CH3
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
TIME (10µs/DIV)
FIGURE 7. DISABLE RESPONSE
FIGURE 8. ENABLE RESPONSE
VOLTAGE (CH1-1V/DIV)(CH2-5V/DIV)
CH2
TURN-OFF
T=90ns
CH3
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
TIME (100ns/DIV)
VOLTAGE (CH1-1V/DIV)(CH2-5V/DIV)
TURN-ON
T=90ns
CH2
CH3
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
TIME (100ns/DIV)
FIGURE 9. TURN-OFF (TRI)
FIGURE 10. TURN-ON (TRI)
VOLTAGE (CH2-5V/DIV)(CH3-1V/DIV)
CH3
GROUND
CH2
VOLTAGE (2V/DIV)
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
1.78V
1.32V
R
L
=0
C
L
=500pF
V
S
=V-=0V
V
S
=V+=18V
PROPAGATION
DELAY
T=52ns
TIME (2µs/DIV)
TIME (40ns/DIV)
FIGURE 11. ENABLE/DISABLE THRESHOLD
FIGURE 12. PROPAGATION DELAY
FN7376 Rev 2.00
January 31, 2005
Page 5 of 8
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