NCP6335
Configurable 4.0 A Step
Down Converter - Transient
Load Helper
The NCP6335 is a synchronous buck converter optimized to supply
the different sub systems of portable applications powered by one cell
Li−Ion or three cell Alkaline/NiCd/NiMH batteries. The device is able
to deliver up to 4.0 A, with programmable output voltage from 0.6 V
to 1.4 V. It can share the same output rail with another DC−to−DC
converter and works as a transient load helper. Operation at a 3 MHz
switching frequency allows the use of small components.
Synchronous rectification and automatic PWM/PFM transitions
improve overall solution efficiency. The NCP6335 is in a space
saving, low profile 2.0 x 1.6 mm CSP−20 package.
Features
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WLCSP20
CASE 568AG
MARKING DIAGRAM
•
Input Voltage Range from 2.3 V to 5.5 V: Battery and 5 V Rail
•
•
•
•
•
•
•
•
•
•
•
•
Powered Applications
Programmable Output Voltage: 0.6 V to 1.4 V in 6.25 mV Steps
Modular Output Stage Drive Strength for Increased Efficiency
Depending on the Output Current
3 MHz Switching Frequency with on Chip Oscillator
Uses 470 nH Inductor and 2 x 22
mF
Capacitors for Optimized
Footprint and Solution Thickness
PFM/PWM Operation for Optimum Increased Efficiency
Low 35
mA
Quiescent Current
I
2
C Control Interface with Interrupt and Dynamic Voltage Scaling
Support
Enable Pins, Power Good/Fail Signaling
Thermal protections and Temperature Management
Transient Load Helper: Share the Same Rail with Another DCDC
Small 2.0 x 1.6 mm / 0.4 mm pitch CSP Package
These are Pb−Free Devices
x
6335x
AWLYWW
G
= D1: Prototype
= F: 3.5 A
= D: 2.5 A (Stand−Alone)
A
= Assembly Location
WL = Wafer Lot
Y
= Year
WW = Work Week
G
= Pb−Free Package
Pb−Free indicator, G or microdot (G),
may or may not be present
PIN OUT
1
2
3
4
A
VSEL
EN
SCL
FB
B
SDA
PGND
INTB*
PGND
PG*
AGND
Typical Applications
•
Smartphones
•
Webtablets
AGND
C
PGND
PGND
PGND
PGND
D1
Core
Thermal
Protection
Enable Control EN
Input
VSEL
A2
A1
DCDC
4.0 A
Modular
Driver
D2
E1
E2
AVIN
PVIN
4.7 uF
470 nH
SW
E
2x 22 uF
PGND
PVIN
PVIN
SW
SW
Supply Input
D
AVIN
PVIN
SW
SW
B4
Operating
D3
D4
E3
E4
C1
C2
C3
C4
Power Fail
Interrupt
Processor I@C
Control Interface
SCL
SDA
B3
B2
B1
A3
Output
Monitoring
(Top View)
*Optional
Processor
Core
I@C
DCDC
3 MHz
Controller
A4
Sense
FB
ORDERING INFORMATION
See detailed ordering and shipping information on page 29 of
this data sheet.
Figure 1. Typical Application Circuit
©
Semiconductor Components Industries, LLC, 2014
1
April, 2014 − Rev. 5
Publication Order Number:
NCP6335/D
NCP6335
PVIN
PVIN
PVIN
SUPPLY INPUT
ANALOG GROUND
POWER INPUT
AVIN
AGND
Core
Thermal
Protection
4.0 A
DC−DC
MODULAR
DRIVER
SW
SW
SW
SW
SWITCH NODE
POWER GOOD
(optional)
PG
Output Voltage
Monitoring
3 MHZ DC−DC
converter
Controller
ENABLE CONTROL INPUT
EN
VSEL
INTB
SCL
SDA
VOLTAGE SELECTION
Operating
Mode Control
PGND
PGND
PGND
PGND
FB
POWER GROUND
INTERRUPT OUTPUT
(optional)
PROCESSOR I2C
CONTROL INTERFACE
Logic Control
Interrupt
I2C
Sense
FEEDBACK
Figure 2. Simplified Block Diagram
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2
NCP6335
1
2
3
4
A
VSEL
EN
SCL
FB
B
SDA
PGND
INTB*
PGND
PG*
AGND
C
PGND
PGND
PGND
PGND
D
AVIN
PVIN
SW
SW
E
PVIN
PVIN
SW
SW
*Optional
Figure 3. Pin Out (Top View)
PIN FUNCTION DESCRIPTION
Pin
REFERENCE
D1
AVIN
Analog Input
Analog Supply. This pin is the device analog and digital supply. Could be connected
directly to the VIN plane just next to the 4.7
mF
PVIN capacitor or to a dedicated
1.0
mF
ceramic capacitor.
Analog Ground. Analog and digital modules ground. Must be connected to the
system ground.
Name
Type
Description
B4
AGND
Analog Ground
CONTROL AND SERIAL INTERFACE
A2
A1
EN
VSEL
Digital Input
Digital Input
Enable Control. Active high will enable the part. There is an internal pull down
resistor on this pin.
Output voltage / Mode Selection. The level determines which of two programmable
configurations to utilize (operating mode / output voltage). There is an internal pull
down resistor on this pin; could be left open if not used.
I
2
C interface
Clock
line. There is an internal pull down resistor on this pin; could be
left open if not used
I
2
C interface Bi−directional
Data
line. There is an internal pull down resistor on this
pin; could be left open if not used
Power Good open drain output. If not used has to be connected to ground plane
Interrupt open drain output. If not used has to be connected to ground plane
A3
B1
B3
B2
SCL
SDA
PGND
PG
PGND
INTB
Digital Input
Digital
Input/Output
Digital Output
Analog ground
Digital Output
Analog Ground
DCDC CONVERTER
D2, E1,
E2
D3, D4,
E3, E4
C1, C2,
C3, C4
PVIN
Power Input
Switch Supply. These pins must be decoupled to ground by a 4.7
mF
ceramic
capacitor. It should be placed as close as possible to these pins. All pins must be
used with short heavy connections.
Switch Node. These pins supply drive power to the inductor. Typical application uses
0.470
mH
inductor; refer to application section for more information.
All pins must be used with short heavy connections.
Switch Ground. This pin is the power ground and carries the high switching current.
High quality ground must be provided to prevent noise spikes. To avoid high−density
current flow in a limited PCB track, a local ground plane that connects all PGND pins
together is recommended. Analog and power grounds should only be connected
together in one location with a trace.
Feedback Voltage input. Must be connected to the output capacitor positive terminal
with a trace, not to a plane. This is the positive input to the error amplifier.
SW
Power Output
PGND
Power Ground
A4
FB
Analog Input
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3
NCP6335
MAXIMUM RATINGS
Rating
Analog and power pins: AVIN, PVIN, SW, PG, INTB, FB
Digital pins: SCL, SDA, EN, VSEL, Pin:
Input Voltage
Input Current
Human Body Model (HBM) ESD Rating are (Note 1)
Charged Device Model (CDM) ESD Rating are (Note 1)
Latch Up Current: (Note 2)
Digital Pins
All Other Pins
Storage Temperature Range
Maximum Junction Temperature
Moisture Sensitivity (Note 3)
Symbol
V
A
V
DG
I
DG
ESD HBM
ESD CDM
I
LU
Value
−0.3 to + 6.0
−0.3 to V
A
+0.3
≤
6.0
10
2500
1250
±10
±100
−65 to + 150
−40 to +150
Level 1
Unit
V
V
mA
V
V
mA
T
STG
T
JMAX
MSL
°C
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and passes the following tests:Human Body Model (HBM)
±2.5
kV per JEDEC standard:
JESD22−A114, Charged Device Model (CDM)
±1.25
kV per JEDEC standard: JESD22−C101 Class IV.
2. Latch up Current per JEDEC standard: JESD78 class II.
3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
OPERATING CONDITIONS
(Note 4)
Symbol
AV
IN,
PV
IN
T
A
T
J
R
qJA
P
D
P
D
L
Co
Cin
Power Supply
Ambient Temperature Range
Junction Temperature Range (Note 5)
Thermal Resistance Junction to Ambient (Note 6)
Power Dissipation Rating (Note 7)
Power Dissipation Rating (Note 7)
Inductor for DCDC converter (Note 4)
Output Capacitor for DCDC Converter (Note 4)
Input Capacitor for DCDC Converter (Note 4)
CSP−20 on Demo−board
T
A
≤
85°C
T
A
= 65°C
Parameter
Conditions
Min
2.3
−40
−40
−
−
−
−
30
4.7
25
25
55
727
1090
0.47
−
−
Typ
Max
5.5
+85
+125
−
−
−
−
150
−
Unit
V
°C
°C
°C/W
mW
mW
mH
mF
mF
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
4. Including de−ratings (Refer to the Application Information section of this document for further details)
5. The thermal shutdown set to 150°C (typical) avoids potential irreversible damage on the device due to power dissipation.
6. The R
qJA
is dependent of the PCB heat dissipation. Board used to drive this data was a NCP6335EVB board. It is a multilayer board with
1−once internal power and ground planes and 2−once copper traces on top and bottom of the board.
7. The maximum power dissipation (P
D
) is dependent by input voltage, maximum output current and external components selected.
R
qJA
+
125
*
T
A
P
D
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4
NCP6335
ELECTRICAL CHARACTERISTICS
(Note 9)
Min and Max Limits apply for T
A
= −40°C to +85°C, AVIN = PVIN = 3.6 V and default configuration, unless otherwise specified.
Typical values are referenced to T
A
= + 25°C, AVIN = PVIN = 3.6 V and default configuration, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SUPPLY CURRENT: PINS AVIN – PVINx
I
Q PWM
I
Q PFM
I
SLEEP
Operating quiescent current
PWM
Operating quiescent current PFM
Product sleep mode current
DCDC active in Forced PWM
no load
DCDC active in Auto mode
no load − minimal switching
EN high, DCDC off or
EN low and (VSEL high or
Sleep_Mode high)
V
IN
= 2.5 V to 5.5 V
EN, VSEL and Sleep_Mode low
V
IN
= 2.5 V to 5.5 V
−
−
−
10
35
7
20
70
15
mA
mA
mA
I
OFF
Product in off mode
−
0.8
5
mA
DCDC CONVERTER
PV
IN
I
OUTMAX
Input Voltage Range
Maximum Output Current
Ipeak[1..0] = 00 (Note 10)
Ipeak[1..0] = 01 (Note 10)
Ipeak[1..0] = 10 (Note 10)
Ipeak[1..0] = 11 (Note 10)
D
VOUT
Output Voltage DC Error
Forced PWM mode, Vin range,
I
OUT
from 0 mA and 300 mA
Forced PWM mode, Vin range,
I
OUT
up to I
OUTMAX
(Note 10)
Auto mode, Vin range,
I
OUT
up to I
OUTMAX
(Note 10)
F
SW
R
ONHS
R
ONLS
I
PK
Switching Frequency
P−Channel MOSFET On
Resistance
N−Channel MOSFET On
Resistance
Peak Inductor Current
From PVIN to SW
V
IN
= 5.0 V
From SW to PGND
V
IN
= 5.0 V
Open loop – Ipeak[1..0] = 00
Open loop – Ipeak[1..0] = 01
Open loop – Ipeak[1..0] = 10
Open loop – Ipeak[1..0] = 11
DC
LOAD
DC
LINE
AC
LOAD
D
t
START
Load Regulation
Line Regulation
Transient Load Response
Maximum Duty Cycle
Turn on time
Time from EN transitions from Low to
High to 90% of Output Voltage
(DELAY[2..0] = 000b)
Time from EN transitions from Low to
High to V
OUT
= 1.127 V (Note 10)
R
DISDCDC
DCDC Active Output Discharge
V
OUT
= 1.15 V
−
25
I
OUT
from 300 mA to I
OUTMAX
I
OUT
= 300 mA
2.3 V
≤
V
IN
≤
5.5 V
tr = ts = 100 ns
Load step 1.2 A (Note 10)
2.3
2.5
3.0
3.5
4.0
−1
−1
−1
2.85
−
−
3.0
3.6
4.0
4.6
−
−
−
−
−
−
−
−
−
−
−
−
−
3
45
22
3.4
4.0
4.4
5.0
−0.2
0
±40
100
80
5.5
−
−
−
−
1
1
2
3.15
80
40
3.8
4.4
4.8
5.4
−
−
−
−
100
ms
150
35
W
%/A
%
mV
%
A
MHz
mW
mW
%
A
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. Devices that use non−standard supply voltages which do not conform to the intent I
2
C bus system levels must relate their input levels
to the V
DD
voltage to which the pull−up resistors R
P
are connected.
9. Refer to the Application Information section of this data sheet for more details.
10. Guaranteed by design and characterized.
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