MJF47G
High Voltage Power
Transistor
Isolated Package Applications
Designed for line operated audio output amplifiers, switching power
supply drivers and other switching applications, where the mounting
surface of the device is required to be electrically isolated from the
heatsink or chassis.
Features
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Electrically Similar to the Popular TIP47
250 V
CEO(sus)
1 A Rated Collector Current
No Isolating Washers Required
Reduced System Cost
UL Recognized, File #E69369, to 3500 V
RMS
Isolation
This is a Pb−Free Device*
Rating
Symbol
V
CEO
V
CB
V
EB
V
ISOL
Value
250
350
5
4500
3500
1500
1
2
0.6
28.4
0.227
2.0
0.016
–65 to +150
Unit
Vdc
Vdc
Vdc
V
NPN SILICON
POWER TRANSISTOR
1 AMPERE
250 VOLTS, 28 WATTS
MAXIMUM RATINGS
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
RMS Isolation Voltage (Note 1)
Test No. 1 Per Figure 10
Test No. 2 Per Figure 11
Test No. 3 Per Figure 12
(for 1 sec, R.H. < 30%, T
A
= 25_C)
Collector Current
−
Continuous
−
Peak
1
2
TO−220 FULLPACK
CASE 221D
STYLE 2
3
MARKING DIAGRAM
I
C
I
B
P
D
P
D
T
J
, T
stg
Symbol
R
qJA
R
qJC
Adc
Adc
W
W/_C
W
W/_C
_C
Unit
_C/W
_C/W
G
A
Y
WW
= Pb−Free Package
= Assembly Location
= Year
= Work Week
MJF47G
AYWW
Base Current
−
Continuous
Total Power Dissipation (Note 2) @ T
C
= 25_C
Derate above 25_C
Total Power Dissipation @ T
A
= 25_C
Derate above 25_C
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case (Note 2)
Max
62.5
4.4
Lead Temperature for Soldering Purposes
T
L
260
_C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Proper strike and creepage distance must be provided.
2. Measurement made with thermocouple contacting the bottom insulated
surface (in a location beneath the die), the devices mounted on a heatsink with
thermal grease and a mounting torque of
≥
6 in. lbs.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
Device
MJF47G
Package
TO−220 FULLPACK
(Pb−Free)
Shipping
50 Units/Rail
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2012
October, 2012
−
Rev. 6
1
Publication Order Number:
MJF47/D
MJF47G
ELECTRICAL CHARACTERISTICS
(T
C
= 25_C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3)
(I
C
= 30 mAdc, I
B
= 0)
Collector Cutoff Current
(V
CE
= 150 Vdc, I
B
= 0)
Collector Cutoff Current
(V
CE
= 350 Vdc, V
BE
= 0)
Emitter Cutoff Current
(V
BE
= 5 Vdc, I
C
= 0)
ON CHARACTERISTICS
(Note 3)
DC Current Gain
(I
C
= 0.3 Adc, V
CE
= 10 Vdc)
(I
C
= 1 Adc, V
CE
= 10 Vdc)
Collector−Emitter Saturation Voltage
(I
C
= 1 Adc, I
B
= 0.2 Adc)
Base−Emitter On Voltage
(I
C
= 1 Adc, V
CE
= 10 Vdc)
DYNAMIC CHARACTERISTICS
Current Gain
−
Bandwidth Product
(I
C
= 0.2 Adc, V
CE
10 Vdc, f = 2 MHz)
3. Pulse Test: Pulse Width
v
300
ms,
Duty Cycle
v
2%.
f
T
10
−
MHz
h
FE
30
10
V
CE(sat)
V
BE(on)
−
−
150
−
1
1.5
Vdc
Vdc
−
V
CEO(sus)
I
CEO
I
CES
I
EBO
250
−
−
−
−
0.2
0.1
1
Vdc
mAdc
mAdc
mAdc
Symbol
Min
Max
Unit
TYPICAL CHARACTERISTICS
200
V
CE
= 10 V
100
hFE , DC CURRENT GAIN
V, VOLTAGE (VOLTS)
60
40
20
- 55°C
10
6
4
2
0.02
T
J
= 150°C
1
0.8
0.6
0.4
0.2
0.04 0.06 0.1
0.2
0.4 0.6
I
C
, COLLECTOR CURRENT (AMPS)
1
2
0
0.02
V
BE(sat)
@ I
C
/I
B
= 5
V
BE(on)
@ V
CE
= 4 V
T
J
= 25°C
V
CE(sat)
@ I
C
/I
B
= 5 V
0.04 0.06
0.1
0.2
0.4 0.6
I
C
, COLLECTOR CURRENT (AMPS)
1
2
25°C
1.2
1.4
Figure 1. DC Current Gain
Figure 2. “On” Voltages
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MJF47G
1
0.5
t
r
T
J
= 25°C
V
CC
= 200 V
I
C
/I
B
= 5
t, TIME (
μ
s)
5
t
s
2
1
0.5
t
f
T
J
= 25°C
V
CC
= 200 V
I
C
/I
B
= 5
t, TIME (
μ
s)
0.2
0.1
0.05
t
d
0.2
0.1
0.05
0.02
0.02
0.01
0.02
0.05
0.2
0.5
0.1
I
C
, COLLECTOR CURRENT (AMPS)
1
2
0.05
0.1
0.2
0.5
I
C
, COLLECTOR CURRENT (AMPS)
1
2
Figure 3. Turn−On Time
Figure 4. Turn−Off Time
TURN-ON PULSE
APPROX
+11 V
V
in
0
V
EB(off)
t
1
t
3
V
CC
R
C
V
in
51
R
B
C
jd
<< C
eb
t1
≤
7 ns
100 < t
2
< 500
ms
t
3
< 15 ns
-4 V
SCOPE
APPROX
+11 V
V
in
t
2
DUTY CYCLE
≈
2%
APPROX - 9 V
R
B
and R
C
VARIED TO OBTAIN
DESIRED CURRENT LEVELS.
TURN-OFF PULSE
Figure 5. Switching Time Equivalent Circuit
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
1
0.5
0.3
0.2
0.1
0.05
0.03
0.02
0.01
0.1
SINGLE PULSE
R
qJC(t)
= r(t) R
qJC
R
qJC
= 4.4°C/W MAX
T
J(pk)
- T
C
= P
(pk)
R
qJC
(t)
0.2 0.3
0.5
1
2
3
5
10
20 30
50
t, TIME (msec)
100
200 300
500
1K
2K
3K
5K
10 K
Figure 6. Thermal Response
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MJF47G
IC, COLLECTOR CURRENT (AMPS)
3
2
1
0.5
0.3
0.2
0.1
CURRENT LIMIT
THERMAL LIMIT @ T
C
= 25°C
SECONDARY BREAKDOWN LIMIT
20
30
50
200
100
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
300
500
ms
1 ms
dc
100
ms
0.05
0.03
10
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
−
V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 7 is based on T
J(pk)
= 150_C; T
C
is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
J(pk)
v
150°C. T
J(pk)
may be calculated from the data in
Figure 6. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
Figure 7. Maximum Forward Bias Safe
Operating Area
PD(AV), AVERAGE POWER DISSIPATION (WATTS)
40
PD(AV), AVERAGE POWER DISSIPATION (WATTS)
2
30
1.5
20
1
10
0.5
0
0
50
100
150
0
200
0
50
100
150
200
T
C
, CASE TEMPERATURE (°C)
T
A
, AMBIENT TEMPERATURE (°C)
Figure 8. Power Derating
Figure 9. Power Derating
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MJF47G
TEST CONDITIONS FOR ISOLATION TESTS*
MOUNTED
FULLY ISOLATED
PACKAGE
LEADS
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
CLIP
CLIP
0.099" MIN
LEADS
0.099" MIN
LEADS
HEATSINK
0.110" MIN
HEATSINK
HEATSINK
Figure 10. Clip Mounting Position
for Isolation Test Number 1
Figure 11. Clip Mounting Position
for Isolation Test Number 2
Figure 12. Screw Mounting Position
for Isolation Test Number 3
*Measurement made between leads and heatsink with all leads shorted together
MOUNTING INFORMATION
4-40 SCREW
PLAIN WASHER
CLIP
HEATSINK
COMPRESSION WASHER
NUT
HEATSINK
Figure 13. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
torque of 6 to 8 in
.
lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con-
stant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in
.
lbs will
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in
.
lbs without adversely affecting the pack-
age. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend
exceeding 10 in
.
lbs of mounting torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
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