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74LV132D118

产品描述Logic Gates QUAD 2-INPUT NAND
产品类别半导体    逻辑   
文件大小820KB,共17页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
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74LV132D118概述

Logic Gates QUAD 2-INPUT NAND

74LV132D118规格参数

参数名称属性值
产品种类
Product Category
Logic Gates
制造商
Manufacturer
NXP(恩智浦)
RoHSDetails
产品
Product
Single-Function Gate
Logic FunctionNAND
Logic Family74LV
Number of Gates4 Gate
Number of Input Lines2 Input
Number of Output Lines1 Output
High Level Output Current- 12 mA
Low Level Output Current12 mA
传播延迟时间
Propagation Delay Time
65 ns
电源电压-最大
Supply Voltage - Max
5.5 V
电源电压-最小
Supply Voltage - Min
1 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
SOT-108
系列
Packaging
Reel
系列
Packaging
MouseReel
系列
Packaging
Cut Tape
FunctionNAND
高度
Height
1.45 mm
Input TypeSchmitt Trigger
长度
Length
8.75 mm
Logic Type2-Input NAND
工作电源电压
Operating Supply Voltage
3.3 V
工作温度范围
Operating Temperature Range
- 40 C to + 125 C
Output Current25 mA
Pd-功率耗散
Pd - Power Dissipation
500 mW (1/2 W)
工厂包装数量
Factory Pack Quantity
2500
宽度
Width
4 mm
单位重量
Unit Weight
0.003527 oz

文档预览

下载PDF文档
74LV132
Quad 2-input NAND Schmitt trigger
Rev. 6 — 9 December 2015
Product data sheet
1. General description
The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC132 and 74HCT132.
The 74LV132 contains four 2-input NAND gates which accept standard input signals.
They are capable of transforming slowly changing input signals into sharply defined,
jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The
difference between the positive voltage V
T+
and the negative voltage V
T
is defined as the
input hysteresis voltage V
H
.
2. Features and benefits
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical output ground bounce < 0.8 V at V
CC
= 3.3 V and T
amb
= 25
C
Typical HIGH-level output voltage (V
OH
) undershoot: > 2 V at V
CC
= 3.3 V and
T
amb
= 25
C
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and from
40 C
to +125
C
3. Applications
Wave and pulse shapers for highly noisy environments
Astable multivibrators
Monostable multivibrators

74LV132D118相似产品对比

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产品种类
Product Category
Logic Gates Logic Gates
制造商
Manufacturer
NXP(恩智浦) NXP(恩智浦)
RoHS Details Details
Logic Family 74LV LV
Number of Gates 4 Gate 4 Gate
Number of Input Lines 2 Input 2 Input
Number of Output Lines 1 Output 1 Output
High Level Output Current - 12 mA - 12 mA
Low Level Output Current 12 mA 12 mA
传播延迟时间
Propagation Delay Time
65 ns 65 ns
电源电压-最大
Supply Voltage - Max
5.5 V 5.5 V
电源电压-最小
Supply Voltage - Min
1 V 1 V
最小工作温度
Minimum Operating Temperature
- 40 C - 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C + 125 C
安装风格
Mounting Style
SMD/SMT SMD/SMT
封装 / 箱体
Package / Case
SOT-108 SOT-108
Function NAND NAND
高度
Height
1.45 mm 1.45 mm
Input Type Schmitt Trigger Schmitt Trigger
长度
Length
8.75 mm 8.75 mm
Logic Type 2-Input NAND CMOS
工作电源电压
Operating Supply Voltage
3.3 V 3.3 V
工厂包装数量
Factory Pack Quantity
2500 1140
宽度
Width
4 mm 4 mm
单位重量
Unit Weight
0.003527 oz 0.003527 oz
系列
Packaging
Cut Tape Tube

 
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