74HC174-Q100; 74HCT174-Q100
Hex D-type flip-flop with reset; positive-edge trigger
Rev. 1 — 17 April 2013
Product data sheet
1. General description
The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops
with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master
reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the
set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the
flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to
be reset LOW. Inputs include clamp diodes. This enables the use of current limiting
resistors to interface inputs to voltages in excess of V
CC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Input levels:
For 74HC174-Q100: CMOS level
For 74HCT174-Q100: TTL level
Six edge-triggered D-type flip-flops
Asynchronous master reset
Complies with JEDEC standard no. 7A
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74HC174D-Q100
74HCT174D-Q100
74HC174PW-Q100
74HCT174PW-Q100
40 C
to +125
C
TSSOP16
40 C
to +125
C
SO16
Description
Version
plastic small outline package; 16 leads; body width SOT109-1
3.9 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
Type number
Nexperia
74HC174-Q100; 74HCT174-Q100
Hex D-type flip-flop with reset; positive-edge trigger
4. Functional diagram
&3
'
'
'
'
'
'
05
DDD
4
4
4
4
4
4
&
5
'
DDD
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
'
'
'
'
'
'
'
4
'
4
))
'
4
))
'
4
))
'
4
))
'
4
))
))
&3 05
&3
05
&3 05
&3 05
&3 05
&3 05
&3 05
4
4
4
4
4
4
DDD
Fig 3.
Logic diagram
74HC_HCT174_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 17 April 2013
2 of 16
Nexperia
74HC174-Q100; 74HCT174-Q100
Hex D-type flip-flop with reset; positive-edge trigger
5. Pinning information
5.1 Pinning
+&4
+&74
05
4
'
'
4
'
4
9
&&
4
'
'
4
'
4
&3
05
4
'
'
4
'
4
*1'
DDD
+&4
+&74
9
&&
4
'
'
4
'
4
&3
*1'
DDD
Fig 4.
Pin configuration SO16
Fig 5.
Pin configuration TSSOP16
5.2 Pin description
Table 2.
Symbol
MR
Q0 to Q5
D0 to D5
GND
CP
V
CC
Pin description
Pin
1
2, 5, 7, 10, 12, 15
3, 4, 6, 11, 13, 14
8
9
16
Description
asynchronous master reset input (active LOW)
flip-flop output
data input
ground (0 V)
clock input (LOW-to-HIGH edge-triggered)
positive supply voltage
74HC_HCT174_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 17 April 2013
3 of 16
Nexperia
74HC174-Q100; 74HCT174-Q100
Hex D-type flip-flop with reset; positive-edge trigger
6. Functional description
Table 3.
Function table
[1]
Inputs
MR
reset (clear)
load “1”
load “0”
[1]
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
X = don’t care;
= LOW-to-HIGH clock transition.
Operating modes
Outputs
CP
X
Dn
X
h
l
Qn
L
H
L
L
H
H
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V)
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
Min
0.5
-
-
-
-
50
65
Max
+7
20
20
25
50
-
+150
500
Unit
V
mA
mA
mA
mA
mA
C
mW
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO16 package: above 70
C
the value of P
tot
derates linearly with 8 mW/K.
For TSSOP16 packages: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
74HC_HCT174_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 17 April 2013
4 of 16
Nexperia
74HC174-Q100; 74HCT174-Q100
Hex D-type flip-flop with reset; positive-edge trigger
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC174-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT174-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74HC174-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
1.9
4.4
5.9
2.0
4.5
6.0
4.32
5.81
0
0
0
0.15
0.16
-
-
-
-
-
-
-
0.1
0.1
0.1
0.26
0.26
0.1
8.0
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
1
80
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1
160
V
V
V
V
V
V
V
V
V
V
A
A
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
I
O
=
4.0
mA; V
CC
= 4.5 V 3.98
I
O
=
5.2
mA; V
CC
= 6.0 V 5.48
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
I
CC
input leakage
current
supply current
V
I
= V
CC
or GND;
V
CC
= 6.0 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 6.0 V
-
-
-
-
-
-
-
74HC_HCT174_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 17 April 2013
5 of 16
嵌入式系统
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