INTEGRATED CIRCUITS
74ABT540
Octal buffer, inverting (3-State)
Product specification
Supersedes data of 1996 Oct 08
IC23 Data Handbook
1998 Jan 16
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal buffer, inverting (3-State)
74ABT540
FEATURES
•
Octal bus interface
•
3-State buffers
•
Live insertion/extraction permitted
•
Efficient pinout to facilitate PC board layout
•
Output capability: +64mA/–32mA
•
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT540 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT540 device is an octal inverting buffer that is ideal for
driving bus lines. The device features input and outputs on opposite
sides of the package to facilitate printed circuit board layout.
•
Power-up 3-State
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
An to Yn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or V
CC
Outputs disabled; V
CC
= 5.5V
TYPICAL
3.1
3
7
50
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT540 N
74ABT540 D
74ABT540 DB
74ABT540 PW
NORTH AMERICA
74ABT540 N
74ABT540 D
74ABT540 DB
74ABT540PW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
LOGIC SYMBOL
OE0
OE0
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
OE1
Y0
A1
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A4
A2
OE1
A0
1
19
2
3
4
5
18
Y0
17
Y1
16
Y2
15
Y3
6
7
14
Y4
13
Y5
8
12
Y6
9
11
Y7
A3
A5
A6
A7
GND 10
SA00197
SA00198
1998 Jan 16
2
853–1609 18864
Philips Semiconductors
Product specification
Octal buffer, inverting (3-State)
74ABT540
LOGIC SYMBOL (IEEE/IEC)
PIN DESCRIPTION
PIN NUMBER
2, 3, 4, 5,
6, 7, 8, 9
SYMBOL
A0 – A7
Y0 – Y7
OE0, OE1
GND
V
CC
NAME AND FUNCTION
Data inputs
Data outputs
Output enables
Ground (0V)
Positive supply voltage
1
19
&
EN
18, 17, 16, 15,
14, 13, 12, 11
1, 19
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
20
FUNCTION TABLE
INPUTS
OE0
L
L
X
H
H
L
X
Z
OE1
L
L
H
X
An
L
H
X
X
OUTPUTS
Yn
H
L
Z
Z
SA00199
= High voltage level
= Low voltage level
= Don’t care
= High impedance ”off” state
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jan 16
3
Philips Semiconductors
Product specification
Octal buffer, inverting (3-State)
74ABT540
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
Min
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
4.5
0
2.0
0.8
–32
64
10
+85
LIMITS
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
Min
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
OL
I
I
I
OFF
I
PU
/I
PD
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
Quiescent supply current
Low-level output voltage
Input leakage current
Power-off leakage current
Power-up/down 3-State
output current
3
3-State output High current
3-State output Low current
Output High leakage current
Output current
1
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
I
or V
O
≤
4.5V
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
Outputs enabled, one input at 3.4V, other
inputs at V
CC
or GND; V
CC
= 5.5V
∆I
CC
Additional supply current per
input pin
2
Outputs 3-State, one data input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
Outputs 3-State, one enable input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
–50
2.5
3.0
2.0
Typ
–0.9
2.9
3.4
2.4
0.42
±0.01
±5.0
±5.0
5.0
–5.0
5.0
–100
50
24
50
0.5
0.5
0.5
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
250
1.5
50
1.5
–50
Max
–1.2
2.5
3.0
2.0
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
250
1.5
50
1.5
T
amb
= –40°C
to +85°C
Min
Max
–1.2
V
V
V
V
V
µA
µA
µA
µA
µA
mA
mA
µA
mA
µA
mA
µA
mA
UNIT
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10% a
transition time of up to 100µsec is permitted.
1998 Jan 16
4
Philips Semiconductors
Product specification
Octal buffer, inverting (3-State)
74ABT540
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Min
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
An to Yn
Output enable time
to High and Low level
Output disable time
from High and Low level
1
2
2
1.0
1.0
1.1
1.1
1.5
1.2
T
amb
= +25°C
V
CC
= +5.0V
Typ
2.9
3.1
4.1
4.6
3.6
2.9
Max
4.1
4.3
4.9
5.8
6.8
5.7
T
amb
= –40°C to +85°C
V
CC
= +5.0V
±0.5V
Min
1.0
1.0
1.1
1.1
1.5
1.2
Max
4.8
4.8
5.9
6.4
7.3
6.2
ns
ns
ns
UNIT
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
OEn
INPUT
An INPUT
V
M
V
M
V
M
V
M
Yn
OUTPUT
t
PZL
t
PLZ
3.5V
t
PHL
t
PLH
V
M
t
PZH
t
PHZ
V
OL
+ 0.3V
V
OL
V
OH
Yn OUTPUT
V
M
V
M
Yn
OUTPUT
V
M
V
OH
– 0.3V
0V
SA00200
SA00201
Waveform 1. Waveforms Showing the Input (An) to Output (Yn)
Propagation Delays
Waveform 2. Waveforms Showing the 3-State Output Enable
and Disable Times
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
SA00012
1998 Jan 16
5
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