Operating Temperature Range ......................... -40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Note 1:
An external pFET or diode is required to achieve negative input protection.
Note 2:
DC current-limited by R
SETI
as well as by thermal design.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 20 TQFN
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
32°C/W
3°C/W
T2055+3C
21-0140
90-0008
For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages.
Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
www.maximintegrated.com
Maxim Integrated
│
2
MAX14721/
MAX14722/
MAX14723
Electrical Characteristics
High-Accuracy, Adjustable Power Limiter
(V
IN
= 5.5V to 60V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 24V, T
A
= +25°C.) (Note 3)
PARAMETER
POWER SUPPLY
IN Voltage Range
Shutdown IN Current
Supply Current
Shutdown OUT Current
UVLO, OVLO
Internal UVLO Trip Level
UVLO Hysteresis
Internal OVLO Trip Level
OVLO Hysteresis
External UVLO Adjustment
Range (Note 4)
External UVLO Select Voltage
External UVLO Leakage
Current
External OVLO Adjustment
Range (Note 4)
External OVLO Select Voltage
External OVLO Leakage
Current
External UVLO/OVLO Set
Voltage
Undervoltage Trip Level on OUT
GP
Gate Clamp Voltage
Gate Active Pullup
Gate Active Pulldown
Shutdown Gate Active Pullup
V
EN
= 5V
V
EN
= 0V, V
HVEN
= 5V
50
V
GP
10
16.1
25
110
2.2
20
50
V
Ω
µA
MΩ
V
OVLO_SEL
I
OVLO_LEAK
V
SET
V
UVLO_OUT
V
OUT
falling, UVLO trip point
V
OUT
rising
V
UVLO_SEL
I
UVLO_LEAK
V
OVLO
V
UVLO
V
IN
falling, UVLO trip point
V
IN
rising
% of typical UVLO
V
IN
falling
V
IN
rising, OVLO trip point
% of typical OVLO
5.5
0.15
-250
6
0.15
-250
1.18
11.5
11.9
1.22
12
12.4
0.38
0.38
32.1
34.5
11.5
11.9
12
12.4
3
33.8
36
6
24
0.5
+250
40
0.5
+250
1.27
12.5
13
35.6
37.4
12.5
13
V
%
V
%
V
V
nA
V
V
nA
V
V
V
IN
I
SHDN
I
IN
I
OFF
V
EN
= 0V, V
HVEN
= 5V, V
IN
< 40V
V
EN
= 0V, V
HVEN
= 5V
V
IN
= V
OUT
= 24V, V
HVEN
= 0V
V
EN
= 0V, V
HVEN
= 5V
5.5
5.25
5.25
1.4
50
60
15
150
1.9
100
V
µA
mA
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
www.maximintegrated.com
Maxim Integrated
│
3
MAX14721/
MAX14722/
MAX14723
Electrical Characteristics (continued)
PARAMETER
INTERNAL FETs
Internal FETs On-Resistance
Current Limit Adjustment Range
Current Limit Accuracy
FLAG
Assertion Drop Voltage
Threshold
Reverse Current-Blocking
Threshold
Reverse Current-Blocking
Response Time
Reverse-Blocking Supply
Current
HVEN
Threshold Voltage
HVEN
Threshold Hysteresis
HVEN
Input Leakage Current
EN, RIPEN, CLTS1, CLTS2
Input Logic-High
EN, RIPEN, CLTS1, CLTS2
Input Logic-Low
EN Input Leakage Current
RIPEN Leakage Current
CLTS_ Leakage Current
LOGIC OUTPUT (FLAG)
Logic-Low Voltage
Input Leakage Current
SETI
R
SETI
x I
LIM
V
RI
I
SINK
= 1mA
I
HVEN_LEAK
V
IH
V
IL
I
EN_LEAK
I
RIPEN_LEAK
V
EN
= 0V, 5V
V
HVEN
= 60V
R
ON
I
LIM
I
LIM_ACC
V
FA
V
RIB
SYMBOL
High-Accuracy, Adjustable Power Limiter
(V
IN
= 5.5V to 60V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 24V, T
A
= +25°C.) (Note 3)
CONDITIONS
I
LOAD
= 100mA, V
IN
≥ 10V,
T
A
= +25ºC
0.2
0.3A ≤ I
LIM
≤ 2A (T
A
= +25°C)
0.2A ≤ I
LIM
≤ 2A
Increase in (V
IN
- V
OUT
) drop until
FLAG
asserts, V
IN
= 24V
V
IN
- V
OUT
(V
IN
- V
OUT
) changes from 0.2V to
-0.3V in 100nsec, t
RIB
is the interval
between V
IN
= V
OUT
and V
IN-GP
=
0.5V without capacitive load on GP
V
OUT
= 24V
-4
-10
-15
480
-9
-14
MIN
TYP
MAX
UNITS
76
101
2
+10
+15
mΩ
A
%
mV
mV
t
RIB
1
1.55
µs
I
RBS
2000
3900
µA
LOGIC INPUT (HVEN, CLTS1, CLTS2, EN, RIPEN)
V
HVEN
_TH
1
2
5
46
1.4
0.4
-1
25
25
0.4
1
1.5
+1
67
3.1
V
%
µA
V
V
µA
µA
µA
V
µA
V
RIPEN = GND
CLTS_ = GND
V
IN
= 5.5V,
FLAG
deasserted
See
Setting the Current-Limit
Threshold
section
Current Mirror Output Ratio
C
IRATIO
8333
www.maximintegrated.com
Maxim Integrated
│
4
MAX14721/
MAX14722/
MAX14723
Electrical Characteristics (continued)
High-Accuracy, Adjustable Power Limiter
(V
IN
= 5.5V to 60V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 24V, T
A
= +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
V
IN
= 24V, switch OFF to ON, R
LOAD
= 240Ω, I
LIM
= 1A, C
OUT
= 4.7µF,
V
OUT
from 20% to 80% of V
IN
V
OUT
> V
UVLO_OUT
, turn-on delay
after fault timers expired
2.18
MIN
TYP
MAX
UNITS
DYNAMIC PERFORMANCE (NOTE 5)
Switch Turn-On Time
Fault Recovery nFET Turn-on
Time
Reverse-Current Fault
Recovery Time
OVP Switch Response Time
Overcurrent Switch Response
time
Startup Timeout
Startup Initial Time
IN Debounce Time
Blanking Time
Autoretry Time
THERMAL PROTECTION
Thermal Foldback
Thermal Shutdown
Thermal-Shutdown Hysteresis
TJ_FB
TJ_MAX
145
170
20
°C
°C
°C
t
ON
t
ON_NFET
t
REV_REC
t
OVP_RES
t
OCP_RES
t
STO
t
STI
t
DEB
t
BLANK
t
RETRY
I
LIM
= 2A
Initial start current-limit foldback
timeout (Figure 1)
Current is continuously limited to
1x/1.5x/2x in this interval (Figure 1)
Interval between V
IN
> V
UVLO
and
V
OUT
= 10% of V
IN
(Figure 2)
(Figure 3 and Figure 4)
(Figure 3, Note 6)
1090
21.8
0.25
21.8
554
118
420
2.40
3
3
1200
24
0.50
24
720
1320
26.4
0.75
26.4
792
730
2.64
µs
µs
ms
µs
µs
ms
ms
ms
ms
ms
Note 3:
All devices are 100% production-tested at T
A
= +25ºC. Specifications over the operating temperature range are guaranteed
by design.
Note 4:
Not production-tested, user-adjustable. See the
Overvoltage Lockout (OVLO)
and
Undervoltage Lockout (UVLO)
sections.
Note 5:
All timing is measured using 20% and 80% levels, unless otherwise specified.
Note 6:
The autoretry time-to-blanking time ratio is fixed and is equal to 30.
1 Introduction
In the mid-1960s, American scientist Maas conducted extensive experimental research on the charging process of open-cell batteries and proposed an acceptable charging curve for ...[详细]
能源基础设施
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