74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs;
3-state
Rev. 2 — 4 March 2013
Product data sheet
1. General description
The 74LVC541A-Q100 is an octal non-inverting buffer/line driver with 5 V tolerant inputs
and outputs. The output enable inputs OE1 and OE2 control the 3-state outputs.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V and 5 V applications.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
NXP Semiconductors
74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVC541AD-Q100
40 C
to +125
C
Name
SO20
TSSOP20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
Version
SOT163-1
Type number
74LVC541APW-Q100
40 C
to +125
C
74LVC541ABQ-Q100
40 C
to +125
C
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
DHVQFN20 plastic dual in-line compatible thermal enhanced
SOT764-1
very thin quad flat package; no leads; 20 terminals;
body 2.5
4.5
0.85 mm
4. Functional diagram
2
A0
Y0
18
3
1
19
2
3
4
5
6
7
8
9
mna898
A1
Y1
17
&
EN
18
4
A2
Y2
16
5
17
16
15
14
13
12
11
8
7
6
A3
Y3
15
A4
Y4
14
A5
Y5
13
A6
Y6
12
9
A7
Y7
11
OE1
1
19
OE2
mna900
Fig 1. IEC logic symbol
Fig 2. Functional diagram
74LVC541A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 4 March 2013
2 of 16
NXP Semiconductors
74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
5. Pinning information
5.1 Pinning
/9&$4
2(
*1'
<
*1'
WHUPLQDO
LQGH[ DUHD
9
&&
2(
<
<
<
<
<
<
<
/9&$4
2(
$
$
$
$
$
$
$
$
9
&&
2(
<
<
<
<
<
<
<
<
DDD
$
$
$
$
$
$
$
$
*1'
DDD
7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
Fig 3. Pin configuration for SO20 and TSSOP20
Fig 4. Pin configuration for DHVQFN20
5.2 Pin description
Table 2.
Symbol
OE1
A[0:7]
GND
Y[0:7]
OE2
V
CC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
Description
output enable input (active LOW)
data input
ground (0 V)
bus output
output enable input (active LOW)
supply voltage
74LVC541A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 4 March 2013
3 of 16
NXP Semiconductors
74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
6. Functional description
Table 3.
Input
OE1
L
L
X
H
[1]
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
Functional table
[1]
Output
OE2
L
L
H
X
An
L
H
X
X
Yn
L
H
Z
Z
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
-
[2]
[2]
Max
+6.5
-
+5.5
50
V
CC
+ 0.5
+6.5
50
100
-
+150
500
Unit
V
mA
V
mA
V
V
mA
mA
mA
C
mW
V
O
> V
CC
or V
O
< 0 V
output HIGH or LOW state
output 3-state or power-down
V
O
= 0 V to V
CC
0.5
0.5
-
-
100
60
T
amb
=
40 C
to +125
C
[3]
-
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SO20 packages: above 70
C
the value of P
tot
derates linearly with 8 mW/K.
For TSSOP20 packages: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
74LVC541A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 4 March 2013
4 of 16
NXP Semiconductors
74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
O
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
functional
input voltage
output voltage
ambient temperature
input transition rise and fall V
CC
= 2.3 V to 2.7 V
rate
V
CC
= 2.7 V to 3.6 V
output HIGH or LOW state
output 3-state
Conditions
Min
1.65
1.2
0
0
0
40
0
0
Typ
-
-
-
-
-
-
-
-
Max
3.6
-
5.5
V
CC
5.5
+125
20
10
Unit
V
V
V
V
V
C
ns/V
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
Conditions
40 C
to +85
C
Min
HIGH-level V
CC
= 1.2 V
input voltage V = 1.65 V to 1.95 V
CC
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
IL
LOW-level
V
CC
= 1.2 V
input voltage V = 1.65 V to 1.95 V
CC
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
OH
HIGH-level
output
voltage
V
I
= V
IH
or V
IL
I
O
=
100 A;
V
CC
= 1.65 V to 3.6 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
18
mA; V
CC
= 3.0 V
I
O
=
24
mA; V
CC
= 3.0 V
V
OL
LOW-level
output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
A;
V
CC
= 1.65 V to 3.6 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
-
-
-
-
-
-
-
-
-
-
0.2
0.45
0.6
0.4
0.55
-
-
-
-
-
0.3
0.65
0.8
0.6
0.8
V
V
V
V
V
V
CC
0.2
1.2
1.8
2.2
2.4
2.2
-
-
-
-
-
-
-
-
-
-
-
-
V
CC
0.3
1.05
1.65
2.05
2.25
2.0
-
-
-
-
-
-
V
V
V
V
V
V
1.08
0.65
V
CC
1.7
2.0
-
-
-
-
Typ
[1]
-
-
-
-
-
-
-
-
Max
-
-
-
-
0.12
0.35
V
CC
0.7
0.8
40 C
to +125
C
Min
1.08
0.65
V
CC
1.7
2.0
-
-
-
-
Max
-
-
-
-
0.12
0.7
0.8
V
V
V
V
V
V
V
Unit
0.35
V
CC
V
74LVC541A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 4 March 2013
5 of 16
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