NVMFD5483NL
Power MOSFET
60 V, 36 mW, 24 A, Dual N−Channel
Features
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Designs
Low R
DS(on)
to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
175°C Operating Temperature
NVMFD5483NLWF − Wettable Flank Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
This is a Pb−Free Device
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R
qJC
(Notes 1, 2, 4)
Power Dissipation
R
qJC
(Notes 1, 2)
Continuous Drain
Current R
qJA
(Notes 1, 3 & 4)
Power Dissipation
R
qJA
(Notes 1 & 3)
Pulsed Drain Current
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
60
"20
24
17
44.1
22.1
6.4
4.5
3.1
1.5
153
−55 to
175
39
39
A
°C
A
mJ
W
A
W
Unit
V
V
A
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V
(BR)DSS
60 V
45 mW @ 4.5 V
Dual N−Channel
D1
D2
R
DS(on)
MAX
36 mW @ 10 V
24 A
I
D
MAX
G1
S1
G2
S2
MARKING DIAGRAM
D1 D1
1
DFN8 5x6
(SO8FL)
CASE 506BT
S1
G1
S2
G2
XXXXXX
AYWZZ
D2 D2
D1
D1
D2
D2
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
GS
= 10 V, I
L(pk)
= 28 A,
L = 0.1 mH)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
XXXXXX = 5483NL
XXXXXX =
(NVMFD5483NL) or
XXXXXX =
5483LW
XXXXXX =
(NVMFD5483NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
NVMFD5483NLT1G
Package
DFN8
(Pb−Free)
DFN8
(Pb−Free)
DFN8
(Pb−Free)
DFN8
(Pb−Free)
Shipping
†
1500/
Tape & Reel
5000/
Tape & Reel
1500/
Tape & Reel
5000/
Tape & Reel
THERMAL RESISTANCE MAXIMUM RATINGS
(Note 1)
Parameter
Junction−to−Case − Steady State (Note 2)
Junction−to−Ambient − Steady State (Note 3)
Symbol
R
qJC
R
qJA
Value
3.4
49
Unit
°C/W
NVMFD5483NLT3G
NVMFD5483NLWFT1G
NVMFD5483NLWFT3G
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted to an ideal (infinite) heat sink.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
May, 2015 − Rev. 3
Publication Order Number:
NVMFD5483NL/D
NVMFD5483NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Gate Threshold Voltage Temperature
Coefficient
Drain−to−Source On Resistance
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
= V
DS
, I
D
= 250
mA
Reference to 25°C
I
D
= 250
mA
V
GS
= 10 V, I
D
= 15 A
V
GS
= 4.5 V, I
D
= 15 A
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 4.5 V, V
DS
= 48 V, I
D
= 10 A
V
GS
= 10 V, V
DS
= 48 V,
I
D
= 10 A
V
GS
= 0 V, f = 1.0 MHz, V
DS
= 25 V
668
152
67
23.4
0.65
2.14
9.16
13.2
nC
nC
pF
1.5
−5.2
29
36
36
45
2.5
V
mV/°C
mW
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
I
GSS
V
GS
= 0 V, I
D
= 250
mA
Reference to 25°C
I
D
= 250
mA
V
GS
= 0 V,
V
DS
= 60 V
T
J
= 25°C
T
J
= 125°C
60
63
1.0
10
±100
nA
V
mV/°C
mA
Symbol
Test Condition
Min
Typ
Max
Unit
V
DS
= 0 V, V
GS
=
±20
V
SWITCHING CHARACTERISTICS
(Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
t
d(on)
t
r
t
d(off)
t
f
T
J
= 25°C
T
J
= 125°C
V
GS
= 4.5 V, V
DS
= 48 V,
I
D
= 5.0 A, R
G
= 2.5
W
6.8
10.3
37.5
23.5
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, d
IS
/d
t
= 100 A/ms,
I
S
= 10 A
V
GS
= 0 V,
I
S
= 10 A
0.87
0.82
30
23.3
6.7
35
nC
ns
1.2
V
5. Pulse Test: pulse width = 300
ms,
duty cycle
v
2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NVMFD5483NL
TYPICAL CHARACTERISTICS
30
4.1 V
I
D
, DRAIN CURRENT (A)
25
20
15
10
5
0
0
1
2
3
4
5
6
7
8
2.7 V
9
10
30
3.9 V
3.7 V
3.5 V
3.3 V
3.1 V
2.9 V
I
D
, DRAIN CURRENT (A)
25
20
15
10
T
J
= 25°C
5
T
J
= 125°C
0
1.0
1.5
2.0
2.5
T
J
= −55°C
3.0
3.5
4.0
4.5
5.0
V
DS
= 5 V
V
GS
= 10 to 4.5 V
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
0.08
0.07
0.06
0.05
0.04
0.03
0.02
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
= 10 A
T
J
= 25°C
Figure 2. Transfer Characteristics
0.06
T
J
= 25°C
0.05
V
GS
= 4.5 V
0.04
V
GS
= 10 V
0.03
0.02
0.01
2
6
10
14
18
22
26
30
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Figure 3. On−Resistance vs. V
GS
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
−50 −25
1.0E−04
I
D
= 10 A
V
GS
= 15 V
I
DSS
, LEAKAGE (A)
1.0E−05
1.0E−06
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 150°C
T
J
= 125°C
1.0E−07
1.0E−08
1.0E−09
1.0E−10
1.0E−11
1.0E−12
T
J
= 25°C
0
25
50
75
100
125
150
175
5
10
15
20
25
30
35
40
45
50
55 60
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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NVMFD5483NL
TYPICAL CHARACTERISTICS
1000
900
C, CAPACITANCE (pF)
800
700
600
500
400
300
200
100
0
0
10
C
rss
20
30
40
50
60
C
oss
C
iss
T
J
= 25°C
V
GS
= 0 V
12
QT
10
8
6
4
2
0
0
2
4
6
8
10
12
14 16
18
20 22 24
Q
g
, TOTAL GATE CHARGE (nC)
Q
gs
Q
gd
V
DD
= 48 V
I
D
= 10 A
T
J
= 25°C
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
I
S
, SOURCE CURRENT (A)
V
DD
= 48 V
V
GS
= 4.5 V
I
D
= 5 A
t, TIME (ns)
100
t
d(off)
t
f
10
t
r
t
d(on)
10
9
8
7
6
5
4
3
2
1
0
1
10
R
G
, GATE RESISTANCE (W)
100
0
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
T
J
= 25°C
V
GS
= 0 V
1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
T
C
= 25°C
V
GS
= 10 V
Single Pulse
Figure 10. Diode Forward Voltage vs. Current
I
D
, DRAIN CURRENT (A)
100
10
ms
100
ms
1 ms
10 ms
dc
10
1
0.1
0.01
0.1
R
DS(on)
Limit
Thermal Limit
Package Limit
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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NVMFD5483NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
10
R(t) (°C/W)
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.001
0.000001
0.00001
0.0001
0.001
0.01
PULSE TIME (sec)
0.1
1
10
100
1000
1
Figure 12. Thermal Response
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