PROFET® BTS 728 L2
Smart High-Side Power Switch
Two Channels: 2 x 60mΩ
Status Feedback
Product Summary
Operating Voltage
V
bb(on)
Active channels
On-state Resistance
R
ON
Nominal load current
I
L(NOM)
Current limitation
I
L(SCr)
4.75...41V
one
two parallel
60mΩ
30mΩ
4.0A
6.0A
17A
17A
Package
P-DSO-20-9
General Description
•
•
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and
diagnostic feedback, monolithically integrated in Smart SIPMOS technology.
Providing embedded protective functions
Applications
•
•
•
•
µC compatible high-side power switch with diagnostic feedback for 5V, 12V and 24V grounded loads
All types of resistive, inductive and capacitve loads
Most suitable for loads with high inrush currents, so as lamps
Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
•
•
•
•
•
•
•
Very low standby current
CMOS compatible input
Improved electromagnetic compatibility (EMC)
Fast demagnetization of inductive loads
Stable behaviour at undervoltage
Wide operating voltage range
Logic ground independent from load ground
Protection Functions
•
•
•
•
•
•
•
•
Short circuit protection
Overload protection
Current limitation
Thermal shutdown
Overvoltage protection (including load dump) with external
resistor
Reverse battery protection with external resistor
Loss of ground and loss of V
bb
protection
Electrostatic discharge protection (ESD)
Block Diagram
Vbb
IN1
ST1
Logic
Channel
1
Logic
Channel
2
PROFET
GND
OUT 1
Load 1
OUT 2
Load 2
IN2
ST2
Diagnostic Function
•
•
•
Diagnostic feedback with open drain output
Open load detection in ON-state
Feedback of thermal shutdown in ON-state
Semiconductor Group
1 of 14
2003-Oct-01
BTS 728 L2
Functional diagram
overvoltage
protection
internal
voltage supply
logic
gate
control
+
charge
pump
current limit
VBB
clamp for
inductive load
OUT1
IN1
ESD
ST1
GND1
temperature
sensor
Open load
detection
LOAD
Channel 1
IN2
ST2
GND2
Control and protection circuit
of
channel 2
OUT2
PROFET
Pin configuration
Pin Definitions and Functions
(top view)
Pin
1,10,
11,12,
15,16,
19,20
3
7
17,18
13,14
4
8
2
6
5,9
Symbol Function
V
bb
Positive power supply voltage.
Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
IN1
Input 1,2,
activates channel 1,2 in case of
IN2
logic high signal
OUT1
Output 1,2,
protected high-side power output
OUT2
of channel 1,2. Design the wiring for the max.
short circuit current
ST1
Diagnostic feedback 1,2
of channel 1,2,
ST2
open drain, low on failure
GND1
Ground 1
of chip 1 (channel 1)
GND2
Ground 2
of chip 2 (channel 2)
N.C.
Not Connected
V
bb
GND1
IN1
ST1
N.C.
GND2
IN2
ST2
N.C.
V
bb
1
2
3
4
5
6
7
8
9
10
•
20
19
18
17
16
15
14
13
12
11
V
bb
V
bb
OUT1
OUT1
V
bb
V
bb
OUT2
OUT2
V
bb
V
bb
Semiconductor Group
2
2003-Oct-01
BTS 728 L2
Maximum Ratings
at
T
j
= 25°C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection
T
j,start
= -40 ...+150°C
Load current (Short-circuit current, see page 5)
Load dump protection
1
)
V
LoadDump
=
V
A
+
V
s
,
V
A
= 13.5 V
R
I
2
)
= 2
Ω,
t
d
= 200 ms; IN = low or high,
each channel loaded with
R
L
= 8.0
Ω,
Operating temperature range
Storage temperature range
Power dissipation (DC)
4)
T
a
= 25°C:
T
a
= 85°C:
(all channels active)
Maximal switchable inductance, single pulse
V
bb
= 12V,
T
j,start
= 150°C
4)
,
I
L
= 4.0 A,
E
AS
= 220 mJ, 0
Ω
one channel:
I
L
= 6.0 A,
E
AS
= 540 mJ, 0
Ω
two parallel channels:
see diagrams on page 9
Symbol
V
bb
V
bb
I
L
V
Load dump3
)
T
j
T
stg
P
tot
Values
43
24
self-limited
60
-40 ...+150
-55 ...+150
3.7
1.9
Unit
V
V
A
V
°C
W
Z
L
19.9
22.3
1.0
4.0
8.0
-10 ... +16
±2.0
±5.0
mH
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5kΩ; C=100pF
V
ESD
kV
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
V
IN
I
IN
I
ST
V
mA
Thermal Characteristics
Parameter and Conditions
Symbol
Values
min
typ
Max
--
--
--
--
41
34
13.5
--
--
Unit
Thermal resistance
junction - soldering point
4),5)
each channel:
R
thjs
junction - ambient
4)
one channel active:
R
thja
all channels active:
1
)
2)
3)
4
)
5
)
K/W
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150Ω
resistor for the GND connection is recommended.
R
I
= internal resistance of the load dump test pulse generator
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
Soldering point: upper side of solder edge of device pin 15. See page 14
Semiconductor Group
3
2003-Oct-01
BTS 728 L2
Electrical Characteristics
Parameter and Conditions,
each of the two channels
at T
j
= -40...+150°C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
Max
Unit
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT);
IL = 2 A, V
bb
≥
7V
each channel,
T
j
= 25°C:
R
ON
T
j
= 150°C:
two parallel channels,
T
j
= 25°C:
see diagram, page 10
--
50
100
25
60
120
30
--
mΩ
Nominal load current
one channel active:
I
L(NOM)
two parallel channels active:
3.6
5.5
--
30
30
0.15
0.15
0.15
0.15
4.75
41
43
--
--
--
4.0
6.0
--
100
100
--
--
--
--
--
--
--
47
10
--
1
A
Device on PCB
6
),
T
a
=
85°C,
T
j
≤
150°C
Output current
while GND disconnected or pulled up
7
)
;
I
L(GNDhigh)
Vbb = 30 V,
V
IN = 0, see diagram page 8
Turn-on time
8
)
IN
2
200
200
1
0.8
1
0.8
41
43
--
52
18
50
10
mA
µs
Turn-off time
IN
R
L
= 12
Ω
Slew rate on
8)
T
j
= -40°C: dV/dt
on
10 to 30%
V
OUT
,
R
L
= 12
Ω
T
j
= 25°C...150°C:
Slew rate off
8)
T
j
= -40°C: -dV/dt
off
70 to 40%
V
OUT
,
R
L
= 12
Ω
T
j
= 25°C...150°C:
Operating Parameters
Operating voltage
Tj=-40
T
j
=25...150°C:
Overvoltage protection
9
)
T
j
=-40°C:
T
j
=25...150°C:
I
bb
= 40 mA
Standby current
10
)
T
j
=-40°C...25°C
:
T
j
=150°C:
V
IN
= 0;
see diagram page 10
Leakage output current (included in
I
bb(off)
)
V
IN
= 0
Operating current
11)
,
V
IN
= 5V,
I
GND
=
I
GND1
+
I
GND2
,
one channel on:
two channels on:
6
)
to 90%
V
OUT
:
t
on
to 10%
V
OUT
:
t
off
V/µs
V/µs
V
bb(on)
V
bb(AZ)
I
bb(off)
I
L(off)
V
V
µA
µA
I
GND
--
--
0.8
1.6
1.5
3.0
mA
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
7
) not subject to production test, specified by design
8
) See timing diagram on page 11.
9)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150Ω
resistor for the GND connection is recommended). See also
V
ON(CL)
in table of protection functions and
circuit diagram on page 8.
10
) Measured with load; for the whole device; all channels off
11
) Add
I
, if
I
ST
ST
> 0
Semiconductor Group
4
2003-Oct-01
BTS 728 L2
Parameter and Conditions,
each of the two channels
at T
j
= -40...+150°C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
Max
Unit
Protection Functions
12)
Current limit,
(see timing diagrams, page 12)
T
j
=-40°C:
I
L(lim)
T
j
=25°C:
T
j
=+150°C:
Repetitive short circuit current limit,
T
j
=
T
jt
each channel
I
L(SCr)
two parallel channels
(see timing diagrams, page 12)
21
17
12
--
--
--
28
22
16
17
17
2.4
36
31
24
--
--
--
A
A
Initial short circuit shutdown time
T
j,start
=25°C:
t
off(SC)
ms
V
(see timing diagrams on page 12)
Output clamp (inductive load switch off)
13)
at VON(CL) = Vbb - VOUT,
I
L= 40 mA
T
j
=-40°C:
V
ON(CL)
T
j
=25°C...150°C:
Thermal overload trip temperature
T
jt
Thermal hysteresis
∆
T
jt
Reverse Battery
Reverse battery voltage
14
)
Drain-source diode voltage
(V
out
> V
bb
)
I
L
= - 4.0 A,
T
j
= +150°C
41
43
150
--
--
47
--
10
--
52
--
--
°C
K
-V
bb
-V
ON
--
--
--
600
32
--
V
mV
12
)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
13
) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
14
) Requires a 150
Ω
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 8).
Semiconductor Group
5
2003-Oct-01
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