MDU13H
TRIPLE, ECL-INTERFACED
FIXED DELAY LINE
(SERIES MDU13H)
FEATURES
•
•
•
•
Three independent delay lines
Fits standard 16-pin DIP socket
Auto-insertable
Input & outputs fully 10KH-ECL interfaced & buffered
GND
1
16
15
14
13
I1
I2
I3
VEE
5
6
7
8
O1
O2
O3
data
3
®
delay
devices,
inc.
PACKAGES
GND
GND
N/C
N/C
N/C
I1
I2
I3
VEE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
O1
O2
O3
N/C
N/C
N/C
N/C
MDU13H-xx DIP
MDU13H-xxM Military DIP
MDU13H-xxC3 SMD
MDU13H-xxMC3 Mil SMD
FUNCTIONAL DESCRIPTION
The MDU13H-series device is a 3-in-1 digitally buffered delay line. The
signal inputs (I1-I3) are reproduced at the outputs (O1-O3), shifted in time
by an amount determined by the device dash number (See Table). The
delay lines function completely independently of each other.
PIN DESCRIPTIONS
I1-I3
O1-O3
VEE
GND
Signal Inputs
Signal Outputs
-5 Volts
Ground
SERIES SPECIFICATIONS
•
•
•
•
•
•
Minimum input pulse width:
50% of total delay
Output rise time:
2ns typical
Supply voltage:
-5VDC
±
5%
Power dissipation:
200mw typical (no load)
Operating temperature:
-30° to 85° C
Temp. coefficient of total delay:
100 PPM/°C
DASH NUMBER SPECIFICATIONS
Part
Number
MDU13H-3
MDU13H-4
MDU13H-5
MDU13H-10
MDU13H-15
MDU13H-20
MDU13H-25
MDU13H-30
MDU13H-35
MDU13H-40
MDU13H-45
MDU13H-50
Delay Per
Line (ns)
3
±
1.0
4
±
1.0
5
±
1.0
10
±
1.0
15
±
1.0
20
±
1.0
25
±
2.0
30
±
2.0
35
±
2.0
40
±
2.0
45
±
2.2
50
±
2.5
O1
O2
O3
100%
100%
100%
* Total delay is referenced to first tap output
Input to first tap = 1.5ns
±
1ns
NOTE: Any dash number between 3 and 50
not shown is also available.
VCC
I1
I2
I3
GND
Functional block diagram
©
1997 Data Delay Devices
Doc #97037
12/11/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
MDU13H
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The MDU13H tolerances are guaranteed for
input pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 50% of the total delay and periods as
small as 100% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
Delay Devices if your application requires device
testing at a specific input condition.
POWER SUPPLY BYPASSING
The MDU13H relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VEE to GND,
located as close as possible to the VEE pin, is
recommended. A wide VEE trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
V
EE
V
IN
T
STRG
T
LEAD
MIN
-7.0
V
EE
- 0.3
-55
MAX
0.3
0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 75C)
PARAMETER
High Level Output Voltage
Low Level Output Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
SYMBOL
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
MIN
-1.020
-1.950
-1.480
475
0.5
TYP
MAX
-0.735
-1.600
-1.070
UNITS
V
V
V
V
µA
µA
NOTES
V
IH
= MAX,50Ω to -2V
V
IL
= MIN, 50Ω to -2V
V
IH
= MAX
V
IL
= MIN
Doc #97037
12/11/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
MDU13H
PACKAGE DIMENSIONS
16 15 14 13
.400
TYP.
1
5
6
7
8
.800 TYP.
.020 .320
TYP. MAX.
.150
±.030
.018 TYP.
.700 TYP.
.100
TYP.
.010 TYP.
.300
TYP.
MDU13H-xx (Commercial DIP)
MDU13H-xxM (Military DIP)
.020 TYP.
16 15 14 13 12 11 10
9
.040
TYP.
.010±.002
.710 .590
±.005
MAX.
.882
±.005
.007
±.005
1
2
3
4
5
6
7
8
.090
.700
.880±.020
.100
.280
MAX.
.050
±.010
MDU13H-xxC3 (Commercial SMD)
MDU13H-xxMC3 (Military SMD)
Doc #97037
12/11/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
MDU13H
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
o
C
±
3
o
C
Supply Voltage (Vcc):
-5.0V
±
0.1V
Input Pulse:
Standard 10KH ECL
levels
Source Impedance:
50Ω Max.
Rise/Fall Time:
2.0 ns Max. (measured
between 20% and 80%)
Pulse Width:
PW
IN
= 1.5 x Total Delay
Period:
PER
IN
= 10 x Total Delay
OUTPUT:
Load:
C
load
:
Threshold:
50Ω to -2V
5pf
±
10%
(V
OH
+ V
OL
) / 2
(Rising & Falling)
NOTE:
The above conditions are for test only and do not in any way restrict the operation of the device.
REF
PULSE
GENERATOR
OUT
TRIG
I1
I2
I3
DEVICE UNDER
TEST (DUT)
O1
O2
O3
IN
TRIG
OSCILLOSCOPE
Test Setup
PER
IN
PW
IN
T
RISE
INPUT
SIGNAL
80%
50%
20%
T
FALL
V
IH
80%
50%
20%
V
IL
T
FALL
T
RISE
OUTPUT
SIGNAL
V
OH
50%
50%
V
OL
Timing Diagram For Testing
Doc #97037
12/11/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4
工作这点儿事
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
