Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V644AWZJ -5, -6
FAST PAGE MODE 536870912 - BIT ( 8388608 - WORD BY 64 - BIT ) DYNAMIC RAM
PIN CONFIGURATION
DESCRIPTION
The MH8V644AWZJ is 8388608-word x 64-bit dynamic
ram module. This consist of eight industry standard 8M x
8 dynamic RAMs in SOJ and one industry standard
EEPROM is TSSOP.
The mounting of SOJs and TSSOP on a card edge dual
in-line package provides any application where high
densities and large of quantities memory are required.
This is a socket-type memory module ,suitable for easy
interchange or addition of module.
85pin
94pin
95pin
1pin
10pin
11pin
FEATURES
Type name
MH8V644AWZJ-5
MH8V644AWZJ-6
/RAS
/CAS Address /OE
access access access access
time
time
time
time
Cycle
time
Power
dissipation
(typ.W)
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns)
50
60
13
15
25
30
13
15
90
110
3.12
2.60
Utilizes industry standard 8M x 8 RAMs in SOJ and industry
standard EEPROM in TSSOP
168-pin (84-pin dual dual in-line package)
Single +3.3V(±0.3V) supply operation
Low stand-by power dissipation
8.64mW(Max) . . . . . . . . . . . . . . . . . . . LVCMOS input level
Low operation power dissipation
MH8V644AWZJ -5 . . . . . . . . . . . . . . . . . . 3.75W(Max)
MH8V644AWZJ -6 . . . . . . . . . . . . . . . . . . 3.46W(Max)
All input are directly LVTTL compatible
All output are three-state and directly LVTTL compatible
Includes(0.22uF x 8) decoupling capacitors
4096 refresh cycle every 64ms
Fast-page mode,Read-modify-write,
/CAS before /RAS refresh,Hidden refresh capabilities
JEDEC standard pin configuration and SPD
Gold plating contact pads
Row Address
A0 ~ A11
Column Address A0 ~ A10
124pin
BACK SIDE
125pin
40pin
FRONT SIDE
41pin
168pin
84pin
APPLICATION
Main memory unit for computers , Microcomputer memory
MIT-DS-0120-0.0
MITSUBISHI
ELECTRIC
( 1 / 20 )
25/Feb./1997
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V644AWZJ -5, -6
FAST PAGE MODE 536870912 - BIT ( 8388608 - WORD BY 64 - BIT ) DYNAMIC RAM
Pin No.
PIN CONFIGURATION
Pin No.
Pin Name
Vss
DQ0
DQ1
DQ2
DQ3
Vcc
DQ4
DQ5
DQ6
DQ7
DQ8
Vss
DQ9
DQ10
DQ11
DQ12
DQ13
Vcc
DQ14
DQ15
NC
NC
Vss
NC
NC
Vcc
/WE0
/CAS0
/CAS1
/RAS0
/OE0
Vss
A0
A2
A4
A6
A8
A10
NC
Vcc
Vcc
DU
Pin Name
Vss
/OE2
/RAS2
/CAS2
/CAS3
/WE2
Vcc
NC
NC
NC
NC
Vss
DQ16
DQ17
DQ18
DQ19
Vcc
DQ20
NC
DU
NC
Vss
DQ21
DQ22
DQ23
Vss
DQ24
DQ25
DQ26
DQ27
Vcc
DQ28
DQ29
DQ30
DQ31
Vss
NC
NC
NC
SDA
SCL
Vcc
Pin No.
Pin Name
Vss
DQ32
DQ33
DQ34
DQ35
Vcc
DQ36
DQ37
DQ38
DQ39
DQ40
Vss
DQ41
DQ42
DQ43
DQ44
DQ45
Vcc
DQ46
DQ47
NC
NC
Vss
NC
NC
Vcc
DU
/CAS4
/CAS5
NC
DU
Vss
A1
A3
A5
A7
A9
A11
NC
Vcc
DU
DU
Pin No.
Pin Name
Vss
DU
NC
/CAS6
/CAS7
DU
Vcc
NC
NC
NC
NC
Vss
DQ48
DQ49
DQ50
DQ51
Vcc
DQ52
NC
DU
NC
Vss
DQ53
DQ54
DQ55
Vss
DQ56
DQ57
DQ58
DQ59
Vcc
DQ60
DQ61
DQ62
DQ63
Vss
NC
NC
SA0
SA1
SA2
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
NC: No Connect
DU: Don't Use
MIT-DS-0120-0.0
MITSUBISHI
ELECTRIC
( 2 / 20 )
25/Feb./1997
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V644AWZJ -5, -6
FAST PAGE MODE 536870912 - BIT ( 8388608 - WORD BY 64 - BIT ) DYNAMIC RAM
/RAS2
/WE2
/OE2
BLOCK DIAGRAM
/RAS0
/WE0
/OE0
/OE
/W
/RAS
/CAS0
M5M465800AJ
D0
/OE
/W
/RAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
/OE
/W
/RAS
/CAS4
M5M465800AJ
D5
/OE
/W
/RAS
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
/CAS1
M5M465800AJ
/CAS5
M5M465800AJ
D1
/OE
/W
/RAS
D6
/OE
/W
/RAS
/CAS2
M5M465800AJ
/CAS6
M5M465800AJ
D3
/OE
/W
/RAS
D7
/OE
/W
/RAS
/CAS3
M5M465800AJ
/CAS7
M5M465800AJ
D4
D8
A0~A11
Vcc
Vss
C
0
.~C
8
..
D0~D8
SCL
D0~D8
EEPROM
A0 A1 A2
SA0 SA1 SA2
SDA
MIT-DS-0120-0.0
MITSUBISHI
ELECTRIC
( 3 / 20 )
25/Feb./1997
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V644AWZJ -5, -6
FAST PAGE MODE 536870912 - BIT ( 8388608 - WORD BY 64 - BIT ) DYNAMIC RAM
Serial Presence Detect TABLE
Bytes
0
1
2
3
4
5
6
7
8
9
Function described
Defines # bytes written into serial memory at module mfgr
Total # bytes of SPD memory device
Fundamental memory type
# Row Addresses on this assembly
# Column Addresses on this assembly
# Module Banks on this assembly
Data Width of this assembly...
... Data Width continuation
Voltage interface standard of this assembly
RAS# access time of this assembly
-5
-6
10
CAS# access time of this assembly
-5
-6
11
12
13
14
15-31
32-61
62
63
DIMM Configuration type (Non-parity,Parity,ECC)
Refresh Rate/Type
DRAM width,Primary DRAM
Error Checking DRAM data width
Reserved for future offerings
Superset Memory type(may be used in future)
SPD Data Revision Code
Checksum for bytes 0-62
SPD entry data
128
256 Bytes
FPM DRAM
A0-A11
A0-A10
1bank
x64
0
3.3V LVTTL
50ns
60ns
13ns
15ns
non parity
N/R(15.625uS)
x8
N/A
open
open
Rev 1
Check sum for -5
Check sum for -6
64-71
72
Manufacturers JEDEC ID code per JEP-106
Manufacturing location
MITSUBISHI
Miyoshi,Japan
Tajima,Japan
NC,USA
Germany
73-90
Manufacturer's Part Number
SPD DATA entry(Hex)
80
08
01
0C
0B
01
40
00
02
32
3C
0D
0F
00
00
08
00
00
00
01
2B
37
1CFFFFFFFFFFFFFF
01
02
03
04
MH8V644AWZJ-5 4D48385636343441575A4A2D352D352020202020
MH8V644AWZJ-6 4D48385636343441575A4A2D362D362020202020
91-92
93-94
95-98
99-125
126-127
128-255
Revision Code
Manufacturing date
Assembly Serial Number
Manufacturer Specific Data
Reserved
Open User Free-Form area not defined
PCB revision
year/week code
serial number
open
open
open
rrrr
yy/ww
ssssssss
00
00
00
MIT-DS-0120-0.0
MITSUBISHI
ELECTRIC
( 4 / 20 )
25/Feb./1997
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH8V644AWZJ -5, -6
FAST PAGE MODE 536870912 - BIT ( 8388608 - WORD BY 64 - BIT ) DYNAMIC RAM
a number of other functions, e.g., Fast page mode, /RAS-
only refresh, and delayed-write. The input conditions for
each are shown in Table 1.
FUNCTION
The MH8V644AWZJ provide, in addition to normal
read, write, and read-modify-write operations,
Table 1 Input conditions for each mode
Operation
Read
Write (Early write)
Write (Delayed write)
Read-modify-write
/CAS before /RAS refresh
Inputs
/RAS
ACT
ACT
ACT
ACT
ACT
NAC
/CAS
ACT
ACT
ACT
ACT
ACT
DNC
/W
NAC
ACT
ACT
ACT
NAC
DNC
/OE
ACT
DNC
DNC
ACT
DNC
DNC
Row Column
address address
APD
APD
APD
APD
APD
APD
APD
APD
DNC
DNC
DNC
DNC
Input/Output
Input
OPN
VLD
VLD
VLD
DNC
DNC
Output
VLD
OPN
IVD
VLD
OPN
OPN
Refresh
YES
YES
YES
YES
YES
NO
Remark
Fast page
mode
identical
Standby
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : Invalid, APD : applied, OPN : open
MIT-DS-0120-0.0
MITSUBISHI
ELECTRIC
( 5 / 20 )
25/Feb./1997
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