PROTECTION PRODUCTS - RailClamp
®
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SRDA series
has been specifically designed to protect sensitive
components which are connected to data and trans-
mission lines from overvoltage caused by electrostatic
discharge
(ESD),
electrical fast transients
(EFT),
and
lightning.
The unique design incorporates surge rated, low
capacitance steering diodes and a TVS diode in a
single package. During transient conditions, the
steering diodes direct the transient current to ground
via the internal low voltage TVS. The TVS diode clamps
the transient voltage to a safe level. The low capaci-
tance array configuration allows the user to protect up
to four high-speed data lines.
The SRDA3.3-4 is constructed using Semtech’s
proprietary EPD process technology. The EPD process
provides low stand-off voltages with significant reduc-
tions in leakage current and capacitance over silicon-
avalanche diode processes. They feature a true
operating voltage of 3.3 volts for superior protection.
These devices are in a 8-pin SOIC package. It mea-
sures 3.9 x 4.9mm. They are available with a SnPb or
RoHS/WEEE compliant matte tin lead finish. The high
surge capability (Ipp=25A, tp=8/20μs) means it can be
used in high threat environments in applications such
as CO/CPE equipment, telecommunication lines, and
video lines.
RailClamp
®
Low Capacitance TVS Array
Features
Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 24A (8/20μs)
Array of surge rated diodes with internal TVS diode
Protects four I/O lines
Low capacitance (<15pF) for high-speed interfaces
Low operating voltage:
3.3V
Low clamping voltage
Solid-state technology
SRDA3.3-4
Mechanical Characteristics
JEDEC SOIC-8 package
Lead Finish: SnPb or Matte Sn
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
Applications
T1/E1 secondary IC Side Protection
T3/E3 secondary IC Side Protection
Analog Video Protection
Microcontroller Input Protection
Base stations
I
2
C Bus Protection
Circuit Diagram
Schematic and PIN Configuration
2, 3
I/O 1
1
8
GND
I/O 1
I/O 2
I/O 3
I/O 4
NC
2
7
I/O 4
NC
5, 8
3
6
I/O 3
I/O 2
4
5
GND
S0-8 (Top View)
Revision 01/15/08
www.semtech.com
1
SRDA3.3-4
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Peak Pulse Power (t
p
= 8/20
μ
s)
Peak Pulse Current (t
p
= 8/20
μ
s)
Lead Soldering Temp erature
Op erating Temp erature
Storage Temp erature
Symbol
P
p k
I
P P
T
L
T
J
T
STG
Value
500
25
260 (10 sec.)
-40 to +85
-55 to +150
Units
Watts
A
°C
°C
°C
Electrical Characteristics (T=25
o
C)
SR DA3.3-4
Parameter
Reverse Stand-Off Voltage
Punch-Through Voltage
Snap -Back Voltage
Reverse Leakage Current
Clamp ing Voltage
Clamp ing Voltage
Clamp ing Voltage
Junction Cap acitance
Symbol
V
RWM
V
PT
V
SB
I
R
V
C
V
C
V
C
C
j
I
PT
= 2
μ
A
I
SB
= 50mA
V
RWM
= 3.3V, T=25°C
I
PP
= 1A, t
p
= 8/20
μ
s
I
PP
= 10A, t
p
= 8/20
μ
s
I
PP
= 25A, t
p
= 8/20
μ
s
Between I/O p ins and
Ground
V
R
= 0V, f = 1MHz
Between I/O p ins
V
R
= 0V, f = 1MHz
8
3.5
2.8
1
5.3
10
15
15
Conditions
Minimum
Typical
Maximum
3.3
Units
V
V
V
μ
A
V
V
V
pF
4
pF
©
2008 Semtech Corp.
2
www.semtech.com
SRDA3.3-4
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
Peak Pulse Power - P
pk
(kW)
Power Derating Curve
110
100
% of Rated Power or
PP
I
90
80
70
60
50
40
30
20
10
1
0.1
0.01
0.1
1
10
Pulse Duration - t
p
(µs)
100
1000
0
0
25
50
75
100
o
125
150
Ambient Temperature - T
A
( C)
Pulse Waveform
110
100
90
80
Percent of I
PP
70
60
50
40
30
20
10
0
0
5
10
15
Time (µs)
20
25
30
td = I
PP
/2
e
-t
Clamping Voltage vs. Peak Pulse Current
Waveform
Parameters:
tr = 8µs
td = 20µs
20
18
Clamping Voltage - Vc (V)
16
14
12
10
8
6
4
2
0
0
5
10
15
20
25
Peak Pulse Current - Ipp (A)
Waveform
Parameters:
tr = 8
∠
s
td = 20∠s
Normalized Junction Capacitance
vs. Reverse Voltage
1.04
1.02
1
Cj (VR) / Cj (VR=0)
0.98
0.96
0.94
0.92
0.9
0.88
0
0.5
1
1.5
2
2.5
3
3.5
Reverse Voltage - VR (V)
©
2008 Semtech Corp.
3
www.semtech.com
SRDA3.3-4
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Four
High-Speed Data Lines
These devices are designed to protect low voltage data
lines operating at 3.3 volts. When the voltage on the
protected line exceeds the punch-through or “turn-on”
voltage of the TVS diode, the steering diodes are
forward biased, conducting the transient current away
from the sensitive circuitry.
Data lines are connected at pins 1, 4, 6 and 7. Pins 5
and 8 should be connected directly to a ground plane.
The path length is kept as short as possible to
minimize parasitic inductance.
Note that pins 2 and 3 are connected internally to the
cathode of the low voltage TVS. It is not recommended
that these pins be directly connected to a DC source
greater than the snap-back votlage (V
SB
) as the device
can latch on as described below.
EPD TVS Characteristics
These devices are constructed using Semtech’s
proprietary EPD technology. By utilizing the EPD tech-
nology, the SRDA3.3-4 can effectively operate at 3.3V
while maintaining excellent electrical characteristics.
The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in tradi-
tional silicon-avalanche TVS diodes. Since the EPD
TVS devices use a 4-layer structure, they exhibit a
slightly different IV characteristic curve when compared
to conventional devices. During normal operation, the
device represents a high-impedance to the circuit up to
the device working voltage (V
RWM
). During an ESD
event, the device will begin to conduct and will enter a
low impedance state when the punch through voltage
(V
PT
) is exceeded. Unlike a conventional device, the low
voltage TVS will exhibit a slight negative resistance
characteristic as it conducts current. This characteris-
tic aids in lowering the clamping voltage of the device,
but must be considered in applications where DC
voltages are present.
When the TVS is conducting current, it will exhibit a
slight “snap-back” or negative resistance characteris-
tics due to its structure. This point is defined on the
curve by the snap-back voltage (V
SB
) and snap-back
©
2008 Semtech Corp.
4
Data Line Protection Using Internal TVS Diode as
Reference
EPD TVS IV Characteristic Curve
I
PP
I
SB
I
PT
V
BRR
I
R
V
RWM
V V V
C
SB
PT
I
BRR
current (I
SB
). To return to a non-conducting state, the
current through the device must fall below the I
SB
(approximately <50mA) and the voltage must fall below
the V
SB
(normally 2.8 volts for a 3.3V device). If a 3.3V
TVS is connected to 3.3V DC source, it will never fall
below the snap-back voltage of 2.8V and will therefore
stay in a conducting state.
www.semtech.com
SRDA3.3-4
PROTECTION PRODUCTS
Typical Applications
LC01-6
8
5
1
4
SRDA3.3-4
LC01-6
T1/E1 Interface Protection (GR-1089 Long Haul)
©
2008 Semtech Corp.
5
www.semtech.com
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