Lead Temperature (soldering, 10s) ................................... 300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (θ
JA
) .....45.10°C/W
Junction-to-Case Thermal Resistance (θ
JC
) .................1°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Recommended Operating Conditions
PARAMETER
Field-Supply Voltage
Field Inputs Voltage
Logic Inputs Voltage
Current-Limit Setting Resistor
SYMBOL
V
CC24V
V
Inn
V
LOGIC
R
REF
VTSELECT = logic 1
VTSELECT = logic 0
Note 2
Note 3
CONDITIONS
MIN
7
-0.3
-0.3
15
150
TYP
MAX
36
+36
+5.5
UNITS
V
V
V
kΩ
DC Electrical Characteristics
PARAMETER
Field-Supply Curent
Field-Supply Low Alarm Off-On
Field-Supply Low Alarm On-Off
Field Input Threshold, High to Low
Field Input Threshold, Low to High
Field Input Hysterisis
Field Input Threshold, High to Low
(T
A
= -40°C to +125°C, T
J
≤ +150°C, V
CC24V
= 7V to 36V, unless otherwise noted.)
SYMBOL
I
CC24V
V
ONUVLO
V
OFFUVLO
VIN1-
(INF)
VIN1+
(INF)
VHYS1
(INF)
VIN0-
(INF)
2.2kΩ external series resistor,
VTSELECT = logic 1, R
REF
= 15kΩ
2.2kΩ external series resistor,
VTSELECT = logic 1, R
REF
= 15kΩ
2.2kΩ external series resistor,
VTSELECT = logic 1, R
REF
= 15kΩ
2.2kΩ external series resistor,
VTSELECT = logic 0, R
REF
= 150kΩ
1.5
7
CONDITIONS
IN1–IN8 = 24V, 5VOUT = open,
OP1–OP8 and all logic inputs = open
7
MIN
TYP
1.6
8
9
8.4
9.4
1
1.7
10.5
10
MAX
2.3
UNITS
mA
V
V
V
V
V
V
www.maximintegrated.com
Maxim Integrated
│
3
MAX31915
Industrial, Octal, Digital Input Translator
DC Electrical Characteristics (continued)
PARAMETER
Field Input Threshold, Low to High
Field Input Hysterisis
Input Threshold, High to Low
(at IC Pin)
Input Threshold, Low to High
(at IC Pin)
Input Threshold Hysteresis
(at IC Pin)
Input Threshold, High to Low
(at IC Pin)
Input Threshold, Low to High
(at IC Pin)
Input Threshold Hysteresis
(at IC Pin)
Field Pin Input Resistance
Field Input Curent Limit
SYMBOL
VIN0+
(INF)
VHYS0
(INF)
VTH1-
(INP)
VTH1+
(INP)
VHYS1
(INP)
VTH0-
(INP)
VTH0+
(INP)
VHYS0
(INP)
R
INP
I
INLIM
(T
A
= -40°C to +125°C, T
J
≤ +150°C, V
CC24V
= 7V to 36V, unless otherwise noted.)
CONDITIONS
2.2kΩ external series resistor,
VTSELECT = logic 0, R
REF
= 150kΩ
2.2kΩ external series resistor,
VTSELECT = logic 0, R
REF
= 150kΩ
VTSELECT = logic 1, R
REF
= 15kΩ
VTSELECT = logic 1, R
REF
= 15kΩ
VTSELECT = logic 1, R
REF
= 15kΩ
VTSELECT = logic 0, R
REF
= 150kΩ
VTSELECT = logic 0, R
REF
= 150kΩ
VTSELECT = logic 0, R
REF
= 150kΩ
1.5
3
MIN
TYP
2.2
0.5
3.4
4.4
1
1.7
2.2
0.5
0.8
R
REF
= 15 kΩ (Note 4),
VTSELECT = logic 1
DB1/DB0 = 0/0: no filtering
Filter Time Constant
t
FILTER
DB1/DB0 = 0/1
DB1/DB0 = 1/0
DB1/DB0 = 1/1
Linear Regulator Output
Regulator Line Regulation
Regulator Load Regulation
Logic-Low Output Voltage
Logic-High Output Voltage
Logic Input Leakage Curent
Overtemperature Alarm
LED On-State Current
V
5VOUT
dVREG
LINE
V
OL
V
OH
I
IL
T
ALRM
Max I
lLOAD
= 50mA
I
LOAD
= 50mA
I
OL
= 4mA
I
OH
= -4mA
All inputs have internal pullups
(Note 5)
R
REF
= 15kΩ
4.0
-50
-30
135
2.2
-15
0.008
0.25
1.0
4.75
2.26
2.45
0
0.025
0.75
3
5.0
10
20
0.4
1.0
0.038
1.1
4.5
5.25
V
mV
mV
V
V
µA
°C
mA
ms
2.72
3.5
5
MAX
3.5
UNITS
V
V
V
V
V
V
V
V
kΩ
mA
dVREG
LOAD
I
LOAD
= 1mA to 50mA
www.maximintegrated.com
Maxim Integrated
│
4
MAX31915
Industrial, Octal, Digital Input Translator
AC Electrical Characteristics
PARAMETER
Input Data Rate
Input Pulse Width
Interchannel Propagation Delay
Mismatch (Interchannel Jitter)
f
IN
(T
A
= -40°C to +125°C, T
J
≤ +150°C, V
CC24V
= 7V to 36V, unless otherwise noted.)
SYMBOL
PW
IN
ϕint
CONDITIONS
DB0, DB1 = 0, 0 (filters disabled)
DB0, DB1 = 0, 0 (filters disabled)
(Note 6)
12V input applied on the field-side
through external 2.2kΩ resistors,
R
REF
set to 15k, VTSELECT = 1
(Notes 7, 8)
Internally slew limited
(with C
LOAD
= 0–50pF)
HBM, all pins
HBM, IN1–IN8 with respect to GND
0.75
25
MIN
TYP
0.5
MAX
1.3
UNITS
Mbps
µs
ns
Propagation Delay
t
PROP
300
700
ns
Output Rise/Fall Times
(on OPn Pins)
ESD
t
R/F
25
±2
±15
ns
kV
Note 2:
If a 24V supply is not available, the device can be powered through 5VOUT. In this mode of operation, the V
CC24V
supply must be left unconnected. All other specifications remain identical. The field-supply alarms are asserted indicating
the absence of the 24V supply in this mode of operation.
Note 3:
When using suggested external 2.2kΩ series resistors, limits of -36V to +36V apply.
Note 4:
External resistor R
REF
can be adjusted to set any desired current limit between 0.5mA and 6mA.
Note 5:
INn-to-OPn propagation delay difference between two channels on the same IC.
Note 6:
Propagation delay from field input (INn) to CMOS output (OPn). Tested with a 6.5V pulse applied directly to the device INn
pins. Propagation delay is measured between the 50% transitions of the rising and falling edges.
Note 7:
The propagation delay limit is 1ms maximum when VTSEL = 0.
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