NVMFS4841N
Power MOSFET
Features
30V, 7 mW, 89A, Single N−Channel SO8FL
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
NVMFS4841NWF
−
Wettable Flanks Product
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
V
(BR)DSS
30 V
R
DS(ON)
MAX
7.0 mW @ 10 V
11.4 mW @ 4.5 V
I
D
MAX
89 A
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
YJ−mb
(Notes 1,
2, 3, 4)
Power Dissipation
R
YJ−mb
(Notes 1, 2, 3)
Continuous Drain Cur-
rent R
qJA
(Notes 1 &
3, 4)
Power Dissipation
R
qJA
(Notes 1, 3)
Pulsed Drain Current
T
mb
= 25°C
Steady
State
T
mb
= 100°C
T
mb
= 25°C
T
mb
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
T
A
= 25°C
I
DM
I
DmaxPkg
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
30
"20
89
63
112
56
16
11
3.7
1.8
336
80
−55
to
175
51
180
A
A
°C
A
mJ
1
Unit
V
V
A
G (4)
W
S (1,2,3)
A
N−CHANNEL MOSFET
D (5,6)
W
MARKING
DIAGRAM
D
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
A
Y
W
ZZ
S
S
S
G
D
XXXXXX
AYWZZ
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
Current limited by package
(Note 4)
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
DD
= 24 V, V
GS
= 10 V,
I
L(pk)
= 19 A, L = 1.0 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
THERMAL RESISTANCE MAXIMUM RATINGS
(Note 1)
Parameter
Junction−to−Mounting Board (top)
−
Steady
State (Note 2, 3)
Junction−to−Ambient
−
Steady State (Note 3)
Symbol
R
YJ−mb
R
qJA
Value
1.3
41
Unit
°C/W
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2013
May, 2013
−
Rev. 3
1
Publication Order Number:
NVMFS4841N/D
NVMFS4841N
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/
T
J
I
DSS
I
GSS
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 10 V, V
DS
= 15 V,
I
D
= 30 A
V
GS
= 4.5 V, V
DS
= 15 V; I
D
= 30 A
V
GS
= 0 V, f = 1 MHz, V
DS
= 12 V
V
GS
= 10 V
V
GS
= 4.5 V
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
SWITCHING CHARACTERISTICS
(Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dI
S
/dt = 100 A/ms,
I
S
= 30 A
V
GS
= 0 V,
I
S
= 30 A
T
J
= 25°C
T
J
= 125°C
0.9
0.8
20.5
11.6
8.9
10.7
nC
ns
1.2
V
t
d(ON)
t
r
t
d(OFF)
t
f
V
GS
= 4.5 V, V
DS
= 15 V, I
D
= 15 A,
R
G
= 3.0
W
13.5
66.5
15.5
7.5
ns
1436
348
177
11.5
2.0
5.0
5.1
25.4
nC
17
nC
pF
I
D
= 30 A
I
D
= 30 A
V
GS
= 0 V,
V
DS
= 30 V
T
J
= 25
°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
30
25
1
10
±100
V
mV/°C
mA
nA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
DS
= 0 V, V
GS
=
±20
V
V
GS
= V
DS
, I
D
= 250
mA
1.5
5.6
4.7
9.2
16
2.5
V
mV/°C
7.0
11.4
mW
S
V
DS
= 15 V, I
D
= 15 A
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
5. Pulse Test: pulse width
v
300
ms,
duty cycle
v
2%.
6. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
NVMFS4841N
TYPICAL PERFORMANCE CURVES
130
120
110
100
90
80
70
60
50
40
30
20
10
0
130
120
110
100
90
80
70
60
50
40
30
20
10
0
I
D
, DRAIN CURRENT (AMPS)
V
GS
= 5 V
4.5 V
4V
3.8 V
3.6 V
3.4 V
0
1
2
3
4
5
I
D
, DRAIN CURRENT (AMPS)
5.5 V to 10 V
T
J
= 25°C
V
DS
= 10 V
T
J
= 125°C
T
J
= 25°C
T
J
=
−55°C
1
2
3
4
5
6
7
8
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.017
Figure 2. Transfer Characteristics
0.018
0.017
0.016
0.015
0.014
0.013
0.012
0.011
0.010
0.009
0.008
0.007
0.006
0.005
I
D
= 30 A
T
J
= 25°C
T
J
= 25°C
0.014
V
GS
= 4.5 V
0.011
0.008
V
GS
= 10 V
0.005
0.002
3
4
5
6
7
8
9
10
11
10
15
20
25
30
35
40
45
50
55
60
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
−50
10000
I
D
= 30 A
V
GS
= 10 V
1000
I
DSS
, LEAKAGE (nA)
100
10
1
0.1
−25
0
25
50
75
100
125
150
175
5
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
T
J
= 125°C
T
J
= 25°C
10
15
20
25
30
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
http://onsemi.com
3
NVMFS4841N
TYPICAL PERFORMANCE CURVES
2200
2000
C, CAPACITANCE (pF)
1800
1600
1400
1200
1000
800
600
400
200
0
10
C
rss
5
0
5
V
GS
V
DS
10
15
20
25
30
C
rss
C
oss
C
iss
T
J
= 25°C
12
11
10
9
8
7
6
5
4
3
2
1
0
0
2
4
Q
GS
Q
GD
V
DD
= 15 V
V
GS
= 10 V
I
D
= 30 A
T
J
= 25°C
6 8 10 12 14 16 18 20 22 24 26
Q
G
, TOTAL GATE CHARGE (nC)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Q
T
C
iss
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
30
IS, SOURCE CURRENT (AMPS)
V
GS
= 0 V
25
20
15
10
5
0
0.5
T
J
= 25°C
V
DD
= 15 V
I
D
= 15 A
V
GS
= 10 V
t, TIME (ns)
100
t
r
t
d(off)
10
t
d(on)
t
f
1
1
10
R
G
, GATE RESISTANCE (W)
100
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
E
AS
, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
1000
I D, DRAIN CURRENT (AMPS)
180
160
140
120
100
80
60
40
20
0
25
Figure 10. Diode Forward Voltage vs. Current
I
D
= 19 A
100
10
ms
100
ms
1 ms
10
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
10 ms
dc
100
1
10
1
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
50
75
100
125
150
175
T
J
, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
4
NVMFS4841N
TYPICAL PERFORMANCE CURVES
100
R
qJ(t)
(°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
Duty Cycle = 0.5
10
0.2
0.1
0.05
1 0.02
0.01
0.1
SINGLE PULSE
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
0.01
0.000001
t, PULSE TIME (s)
Figure 13. FET Thermal Response
DEVICE ORDERING INFORMATION
Device
NVMFS4841NT1G
NVMFS4841NWFT1G
NVMFS4841NT3G
NVMFS4841NWFT3G
Marking
V4841
4841WF
V4841
4841WF
Package
DFN5
(Pb−Free)
DFN5
(Pb−Free)
DFN5
(Pb−Free)
DFN5
(Pb−Free)
Shipping
†
1500 / Tape & Reel
1500 / Tape & Reel
5000 / Tape & Reel
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
