74VHC00
QUAD 2-INPUT NAND GATE
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 3.7ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
µA
(MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (MAX.)
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
DESCRIPTION
The 74VHC00 is an advanced high-speed CMOS
QUAD 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
Figure 1: Pin Connection And IEC Logic Symbols
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Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
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74VHC00MTR
74VHC00TTR
November 2004
Rev. 5
1/11
74VHC00
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
Table 4: Absolute Maximum Ratings
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
I
CC
or I
GND
DC V
CC
or Ground Current
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions
Symbol
V
CC
V
I
V
O
Parameter
Value
2 to 5.5
0 to 5.5
0 to V
CC
-55 to 125
0 to 100
0 to 20
Unit
V
V
V
°C
ns/V
te
le
so
b
O
Supply Voltage
Input Voltage
Output Voltage
T
op
r
P
od
uc
)-
(s
t
b
O
so
t
le
r
P
e
Value
±
20
±
25
±
50
du
o
s)
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c
Unit
V
V
V
mA
mA
mA
mA
°C
°C
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
-65 to +150
300
Operating Temperature
Input Rise and Fall Time (note 1) (V
CC
= 3.3
±
0.3V)
(V
CC
= 5.0
±
0.5V)
dt/dv
1) V
IN
from 30% to 70% of V
CC
2/11
74VHC00
Table 6: DC Specifications
Test Condition
Symbol
Parameter
V
CC
(V)
2.0
3.0 to
5.5
2.0
3.0 to
5.5
2.0
3.0
4.5
3.0
4.5
V
OL
Low Level Output
Voltage
2.0
3.0
4.5
3.0
4.5
I
I
I
CC
Input Leakage
Current
Quiescent Supply
Current
0 to
5.5
5.5
I
O
=-50
µA
I
O
=-50
µA
I
O
=-50
µA
I
O
=-4 mA
I
O
=-8 mA
I
O
=50
µA
I
O
=50
µA
I
O
=50
µA
I
O
=4 mA
I
O
=8 mA
V
I
= 5.5V or GND
V
I
= V
CC
or GND
T
A
= 25°C
Min.
1.5
0.7V
CC
0.5
0.3V
CC
1.9
2.9
4.4
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
2.0
3.0
4.5
1.9
2.9
4.4
2.48
3.8
0.1
0.1
0.1
Typ.
Max.
Value
-40 to 85°C
Min.
1.5
0.7V
CC
0.5
0.3V
CC
1.9
2.9
4.4
2.4
Max.
-55 to 125°C
Min.
1.5
0.7V
CC
0.5
0.3V
CC
V
V
Max.
Unit
V
IH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
V
IL
V
OH
Table 7: AC Electrical Characteristics
(Input t
r
= t
f
= 3ns)
Symbol
Parameter
t
PLH
t
PHL
Propagation Delay
Time
(*) Voltage range is 3.3V
±
0.3V
(**) Voltage range is 5.0V
±
0.5V
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ro
P
V
CC
(V)
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
Test Condition
C
L
(pF)
15
50
15
50
T
A
= 25°C
Min.
Typ.
5.5
8.0
3.7
5.2
Max.
7.9
11.4
5.5
7.5
uc
d
)-
(s
t
b
O
so
0.36
0.36
±
0.1
2
t
le
r
P
e
0.44
0.44
±
1
20
3.7
du
o
0.1
0.1
0.1
0.55
0.55
±
1
20
s)
t(
c
V
V
µA
µA
Value
-40 to 85°C
Min.
1.0
1.0
1.0
1.0
Max.
9.5
13.0
6.5
8.5
-55 to 125°C
Min.
1.0
1.0
1.0
1.0
Max.
9.5
13.0
6.5
8.5
ns
Unit
3/11
74VHC00
Table 8: Capacitive Characteristics
Test Condition
Symbol
Parameter
T
A
= 25°C
Min.
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
Typ.
6
19
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
Unit
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per gate)
Table 9: Dynamic Switching Characteristics
Test Condition
Symbol
Parameter
V
CC
(V)
5.0
T
A
= 25°C
Min.
Typ.
0.3
-0.8
C
L
= 50 pF
3.5
-0.3
Max.
0.8
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
5.0
5.0
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Figure 3: Test Circuit
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so
b
1.5
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Unit
V
V
V
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50Ω)
4/11
74VHC00
Figure 4: Waveform - Propagation Delays
(f=1MHz; 50% duty cycle)
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5/11
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