PD - 97322
IRFP4368PbF
Applications
l
High Efficiency Synchronous Rectification in
SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
HEXFET
®
Power MOSFET
D
V
DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
Benefits
l
Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l
Fully Characterized Capacitance and
Avalanche SOA
l
Enhanced body diode dV/dt and dI/dt
Capability
S
75V
1.46mΩ
1.85mΩ
350Ac
195A
D
D
G
S
TO-247AC
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
350c
250c
195
1280
520
3.4
± 20
13
-55 to + 175
300
10lbxin (1.1Nxm)
Units
A
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
e
Avalanche Current
d
Repetitive Avalanche Energy
g
430
See Fig. 14, 15, 22a, 22b
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
Parameter
Junction-to-Case
k
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
jk
Typ.
–––
0.24
–––
Max.
0.29
–––
40
Units
°C/W
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1
06/02/08
IRFP4368PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
75
––– –––
––– 0.077 –––
––– 1.46 1.85
2.0
–––
4.0
––– –––
20
––– ––– 250
––– ––– 100
––– ––– -100
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 5mAd
mΩ V
GS
= 10V, I
D
= 195A
g
V V
DS
= V
GS
, I
D
= 250µA
µA V
DS
= 75V, V
GS
= 0V
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
R
G(int)
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Internal Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
650
–––
–––
–––
–––
–––
Conditions
V
DS
= 50V, I
D
= 195A
I
D
= 195A
V
DS
= 38V
V
GS
= 10V
g
I
D
= 195A, V
DS
=0V, V
GS
= 10V
–––
380
79
105
275
0.80
43
–––
570
–––
–––
–––
–––
–––
S
nC
Ω
–––
ns
V
DD
= 49V
I
D
= 195A
R
G
= 2.7Ω
V
GS
= 10V
g
V
GS
= 0V
V
DS
= 50V
ƒ = 100kHz
V
GS
= 0V, V
DS
= 0V to 60V
i
V
GS
= 0V, V
DS
= 0V to 60V
h
––– 220 –––
––– 170 –––
––– 260 –––
––– 19230 –––
––– 1670 –––
––– 770 –––
Effective Output Capacitance (Energy Related)i ––– 1700 –––
––– 1410 –––
Effective Output Capacitance (Time Related)h
pF
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
di
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
––– 350c
–––
1280
A
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
––– –––
1.3
V
––– 130 200
ns
––– 140 210
––– 450 680
nC
T
J
= 125°C
––– 530 800
–––
9.1
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 195A, V
GS
= 0V
g
T
J
= 25°C
V
R
= 64V,
T
J
= 125°C
I
F
= 195A
di/dt = 100A/µs
g
T
J
= 25°C
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. Refer to App Notes (AN-1140).
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.022mH
R
G
= 25Ω, I
AS
= 195A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
195A, di/dt
≤
1740A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
2
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IRFP4368PbF
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
ID, Drain-to-Source Current (A)
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
4.5V
100
100
4.5V
≤
60µs PULSE WIDTH
Tj = 25°C
10
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
10
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
Fig 2.
Typical Output Characteristics
2.5
ID = 195A
VGS = 10V
2.0
(Normalized)
ID, Drain-to-Source Current (A)
VDS = 25V
≤
60µs PULSE WIDTH
100
1.5
T J = 175°C
10
T J = 25°C
1.0
1.0
1
2
3
4
5
6
7
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
1E+006
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 195A
VGS , Gate-to-Source Voltage (V)
10.0
100000
C, Capacitance (pF)
VDS= 60V
VDS= 38V
8.0
Ciss
10000
Coss
Crss
6.0
4.0
1000
2.0
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0.0
0
50
100 150 200 250 300 350 400
Q G , Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFP4368PbF
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
T J = 175°C
1000
100µsec
100
1msec
10msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
1
10
T J = 25°C
1
VGS = 0V
0.1
0.0
0.4
0.8
1.2
1.6
2.0
VSD, Source-to-Drain Voltage (V)
DC
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode Forward Voltage
350
300
ID, Drain Current (A)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Fig 8.
Maximum Safe Operating Area
95
Id = 5.0mA
90
Limited By Package
250
200
150
100
50
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
85
80
75
70
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
6.0
Fig 10.
Drain-to-Source Breakdown Voltage
2000
EAS , Single Pulse Avalanche Energy (mJ)
5.0
1500
ID
TOP
33A
53A
BOTTOM 195A
4.0
Energy (µJ)
3.0
1000
2.0
500
1.0
0.0
10
20
30
40
50
60
70
80
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
4
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IRFP4368PbF
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
C
τ
τ
4
Ri (°C/W)
0.0145
0.0661
0.1257
0.0838
τi
(sec)
0.000024
0.000148
0.002766
0.017517
τ
1
τ
2
τ
3
τ
4
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆
Tj = 150°C and
Tstart =25°C (Single Pulse)
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
500
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 195A
EAR , Avalanche Energy (mJ)
400
300
200
100
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
175
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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