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HCF4032BM1

产品描述TRIPLE SERIAL ADDERS
产品类别逻辑    逻辑   
文件大小221KB,共11页
制造商ST(意法半导体)
官网地址http://www.st.com/
标准
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HCF4032BM1概述

TRIPLE SERIAL ADDERS

HCF4032BM1规格参数

参数名称属性值
是否Rohs认证符合
厂商名称ST(意法半导体)
零件包装代码SOIC
包装说明SOP, SOP16,.25
针数16
Reach Compliance Codecompli
其他特性SERIAL ADDER; CLEAR FOR CARRY ONLY; SYNCHRONOUS CLEAR
系列4000/14000/40000
JESD-30 代码R-PDSO-G16
JESD-609代码e4
长度9.9 mm
负载电容(CL)50 pF
逻辑集成电路类型ADDER/SUBTRACTOR
位数1
功能数量3
端子数量16
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP16,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE
电源3/15 V
传播延迟(tpd)650 ns
认证状态Not Qualified
座面最大高度1.75 mm
最大供电电压 (Vsup)20 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
宽度3.9 mm

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HCC/HCF4032B
HCC/HCF4038B
TRIPLE SERIAL ADDERS
.
.
.
.
.
.
.
.
.
.
INVERT INPUTS ON ALL ADDERS FOR SUM
COMPLEMENTING APPLICATIONS
FULLY STATIC OPERATION...DC TO 10MHz
(typ.) @ V
DD
= 10V
BUFFERED INPUTS AND OUTPUTS
SINGLE-PHASE CLOCKING
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATING
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY
HCF40XXBC1
PIN CONNECTIONS
DESCRIPTION
The
HCC/4032B/4038B
(extended temperature
range) and
HCF4032B/4038B
(intermediate tem-
perature range) are monolithic integrated circuits,
available in 16-lead dual in-line plastic or ceramic
package and plastic micro package.
The
HCC/HCF4032B
and
HCC/HCF4038B
types
consist of three serial adder circuits with common
CLOCK and CARRY-RESET inputs. Each adder
has two provisions for two serial DATA INPUT sig-
nals and an INVERT command signal. When the
command signal is a logical ”1”, the sum is com-
plemented. Data words enter the adder with the
least significant bit first ; the sign bit trails. The output
is the MOD 2 sum of the input bits plus the carry from
the previous bit position. The carry is only added at
the positive-going clock transition for the
HCC/HCF4032B
or at the negative-going clock for
the
HCC/HCF4038B,
thus, for spike-free operation
the input data transitions should occur as soon as
possible after the triggering edge. The CARRY is
reset to a logical ”0” at the end of each word by ap-
plying a logical ”1” signal to a CARRY-RESET input
one-bit-position before the application of the first bit
of the next word.
June 1989
1/11

 
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