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HCF40101B

产品描述9-BIT PARITY GENERATOR/CHECKER
文件大小254KB,共11页
制造商ST(意法半导体)
官网地址http://www.st.com/
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HCF40101B概述

9-BIT PARITY GENERATOR/CHECKER

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HCC/HCF40101B
9-BIT PARITY GENERATOR/CHECKER
.
.
.
.
.
.
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED AT 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40101BF
HCF40101BM1
HCF40101BEY
HCF40101BC1
PIN CONNECTIONS
DESCRIPTION
The
HCC40101B
(extended temperature range)
and
HCF40101B
(intermediate temperature range)
are monolithic integrated circuits, available in 14-
lead dual in-line plastic or ceramic package and
plastic micro package.
The
HCC/HCF40101B
is a 9-bit (8 data bits plus 1
parity bit) parity generator/checker. It may be used
to detect errors in data transmission or data retrie-
val. Odd and even outputs facilitate odd or even
parity generation and checking. When used as a
parity generator, a parity bit is supplied along with
the data to generate an even or odd parity output.
When used a parity checker, the received data bits
and parity bits are compared for correct parity. The
even or odd outputs are used to indicate an error in
the received data. Word-length capability is expan-
dable by cascading. The
HCC/HCF40101B
is also
provided with an inhibit control. If the inhibit control
is set at logical ”1”, the even and odd outputs go to
a logical ”0”.
June 1989
1/11

HCF40101B相似产品对比

HCF40101B HCF40101 HCC40101BF HCC40101B HCF40101BC1 HCF40101BEY HCF40101BM1
描述 9-BIT PARITY GENERATOR/CHECKER 9-BIT PARITY GENERATOR/CHECKER 9-BIT PARITY GENERATOR/CHECKER 9-BIT PARITY GENERATOR/CHECKER 9-BIT PARITY GENERATOR/CHECKER 9-BIT PARITY GENERATOR/CHECKER 9-BIT PARITY GENERATOR/CHECKER
是否Rohs认证 - - 不符合 - 符合 符合 符合
厂商名称 - - ST(意法半导体) - ST(意法半导体) ST(意法半导体) ST(意法半导体)
零件包装代码 - - DIP - QLCC DIP SOIC
包装说明 - - DIP, DIP14,.3 - QCCJ, LDCC20,.4SQ PLASTIC, DIP-14 SOP, SOP14,.25
针数 - - 14 - 20 14 14
Reach Compliance Code - - _compli - compli compli compli
其他特性 - - ODD/EVEN PARITY GENERATOR; WITH INHIBIT - ODD/EVEN PARITY GENERATOR; WITH INHIBIT ODD/EVEN PARITY GENERATOR; WITH INHIBIT ODD/EVEN PARITY GENERATOR; WITH INHIBIT
系列 - - 4000/14000/40000 - 4000/14000/40000 4000/14000/40000 4000/14000/40000
JESD-30 代码 - - R-GDIP-T14 - S-PQCC-J20 R-PDIP-T14 R-PDSO-G14
JESD-609代码 - - e0 - e3 e3 e4
负载电容(CL) - - 50 pF - 50 pF 50 pF 50 pF
逻辑集成电路类型 - - PARITY GENERATOR/CHECKER - PARITY GENERATOR/CHECKER PARITY GENERATOR/CHECKER PARITY GENERATOR/CHECKER
位数 - - 9 - 9 9 9
功能数量 - - 1 - 1 1 1
端子数量 - - 14 - 20 14 14
最高工作温度 - - 125 °C - 85 °C 125 °C 125 °C
最低工作温度 - - -55 °C - -40 °C -55 °C -55 °C
输出极性 - - COMPLEMENTARY - COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
封装主体材料 - - CERAMIC, GLASS-SEALED - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 - - DIP - QCCJ DIP SOP
封装等效代码 - - DIP14,.3 - LDCC20,.4SQ DIP14,.3 SOP14,.25
封装形状 - - RECTANGULAR - SQUARE RECTANGULAR RECTANGULAR
封装形式 - - IN-LINE - CHIP CARRIER IN-LINE SMALL OUTLINE
峰值回流温度(摄氏度) - - NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
电源 - - 3/18 V - 3/15 V 3/15 V 3/15 V
传播延迟(tpd) - - 700 ns - 700 ns 700 ns 700 ns
认证状态 - - Not Qualified - Not Qualified Not Qualified Not Qualified
座面最大高度 - - 5.08 mm - 4.57 mm 5.1 mm 1.75 mm
最大供电电压 (Vsup) - - 18 V - 15 V 20 V 20 V
最小供电电压 (Vsup) - - 3 V - 3 V 3 V 3 V
标称供电电压 (Vsup) - - 5 V - 5 V 5 V 5 V
表面贴装 - - NO - YES NO YES
技术 - - CMOS - CMOS CMOS CMOS
温度等级 - - MILITARY - INDUSTRIAL MILITARY MILITARY
端子面层 - - Tin/Lead (Sn/Pb) - Matte Tin (Sn) Matte Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式 - - THROUGH-HOLE - J BEND THROUGH-HOLE GULL WING
端子节距 - - 2.54 mm - 1.27 mm 2.54 mm 1.27 mm
端子位置 - - DUAL - QUAD DUAL DUAL
处于峰值回流温度下的最长时间 - - NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
宽度 - - 7.62 mm - 8.9662 mm 7.62 mm 3.9 mm

 
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