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HCC4032BM1

产品描述TRIPLE SERIAL ADDERS
文件大小221KB,共11页
制造商ST(意法半导体)
官网地址http://www.st.com/
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HCC4032BM1概述

TRIPLE SERIAL ADDERS

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HCC/HCF4032B
HCC/HCF4038B
TRIPLE SERIAL ADDERS
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INVERT INPUTS ON ALL ADDERS FOR SUM
COMPLEMENTING APPLICATIONS
FULLY STATIC OPERATION...DC TO 10MHz
(typ.) @ V
DD
= 10V
BUFFERED INPUTS AND OUTPUTS
SINGLE-PHASE CLOCKING
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATING
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY
HCF40XXBC1
PIN CONNECTIONS
DESCRIPTION
The
HCC/4032B/4038B
(extended temperature
range) and
HCF4032B/4038B
(intermediate tem-
perature range) are monolithic integrated circuits,
available in 16-lead dual in-line plastic or ceramic
package and plastic micro package.
The
HCC/HCF4032B
and
HCC/HCF4038B
types
consist of three serial adder circuits with common
CLOCK and CARRY-RESET inputs. Each adder
has two provisions for two serial DATA INPUT sig-
nals and an INVERT command signal. When the
command signal is a logical ”1”, the sum is com-
plemented. Data words enter the adder with the
least significant bit first ; the sign bit trails. The output
is the MOD 2 sum of the input bits plus the carry from
the previous bit position. The carry is only added at
the positive-going clock transition for the
HCC/HCF4032B
or at the negative-going clock for
the
HCC/HCF4038B,
thus, for spike-free operation
the input data transitions should occur as soon as
possible after the triggering edge. The CARRY is
reset to a logical ”0” at the end of each word by ap-
plying a logical ”1” signal to a CARRY-RESET input
one-bit-position before the application of the first bit
of the next word.
June 1989
1/11

 
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