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74LVC574APW,112: 产品描述74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge triggern (3-state) TSSOP2 20-Pin; 产品类别逻辑逻辑; 文件大小787KB，共19页; 制造商Nexperia; 官网地址https://www.nexperia.com; 标准

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74LVC574APW,112概述

74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge triggern (3-state) TSSOP2 20-Pin

74LVC574APW,112规格参数

参数名称	属性值
Brand Name	Nexperia
是否Rohs认证	符合
厂商名称	Nexperia
零件包装代码	TSSOP2
包装说明	4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20
针数	20
制造商包装代码	SOT360-1
Reach Compliance Code	compliant
Samacsys Description	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger (3-state)@en-us
其他特性	BROADSIDE VERSION OF 374
系列	LVC/LCX/Z
JESD-30 代码	R-PDSO-G20
JESD-609代码	e4
长度	6.5 mm
逻辑集成电路类型	BUS DRIVER
湿度敏感等级	1
位数	8
功能数量	1
端口数量	2
端子数量	20
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	TSSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	NOT SPECIFIED
传播延迟（tpd）	10 ns
座面最大高度	1.1 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1.2 V
标称供电电压 (Vsup)	2.7 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING
端子节距	0.65 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
宽度	4.4 mm
Base Number Matches	1

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74LVC574A

Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive

edge-trigger; 3-state

Rev. 5 — 18 December 2012

Product data sheet

1. General description

The 74LVC574A is an octal D-type flip-flop featuring separate D-type inputs for each

flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an Output

Enable (OE) input are common to all flip-flops.

The eight flip-flops will store the state of their individual D-inputs that meet the set-up and

hold times requirements on the LOW to HIGH CP transition.

When OE is LOW, the contents of the eight flip-flops are available at the outputs. When

OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input

does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices as translators in

mixed 3.3 V or 5 V applications.

The 74LVC574A is functionally identical to the 74LVC374A, but has a different pin

arrangement.

2. Features and benefits



5 V tolerant inputs for interfacing with 5 V logic

Supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Direct interface with TTL levels

High-impedance when V

= 0 V

8-bit positive edge-triggered register

Independent register and 3-state buffer operation

Flow-through pin-out architecture

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Specified from

40 C

to +85

C

and

40 C

to +125

C

74LVC574APW,112相似产品对比

	74LVC574APW,112	74LVC574ADB,112	74LVC574AD,112	74LVC574APW,118	74LVC574ABQ,115	74LVC574ADB,118
描述	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge triggern (3-state) TSSOP2 20-Pin	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge triggern (3-state) SSOP2 20-Pin	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge triggern (3-state) SOP 20-Pin	IC FF D-TYPE SNGL 8BIT 20TSSOP	IC FF D-TYPE SNGL 8BIT 20DHVQFN	IC FF D-TYPE SNGL 8BIT 20SSOP
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
零件包装代码	TSSOP2	SSOP2	SOP	TSSOP2	QFN	SSOP2
包装说明	4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20	5.30 MM, PLASTIC, MO-150, SOT-339-1, SSOP-20	SOP,	SOP-20	2.50 X 4.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-764-1, DHVQFN-20	SOP-20
针数	20	20	20	20	20	20
制造商包装代码	SOT360-1	SOT339-1	SOT163-1	SOT360-1	SOT764-1	SOT339-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant
系列	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 代码	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PQCC-N20	R-PDSO-G20
JESD-609代码	e4	e4	e4	e4	e4	e4
长度	6.5 mm	7.2 mm	12.8 mm	6.5 mm	4.5 mm	7.2 mm
逻辑集成电路类型	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
湿度敏感等级	1	1	1	1	1	1
位数	8	8	8	8	8	8
功能数量	1	1	1	1	1	1
端口数量	2	2	2	2	2	2
端子数量	20	20	20	20	20	20
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TSSOP	SSOP	SOP	TSSOP	HVQCCN	SSOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	NOT SPECIFIED	260	260	NOT SPECIFIED	260	260
传播延迟（tpd）	10 ns	10 ns	10 ns	10 ns	10 ns	10 ns
座面最大高度	1.1 mm	2 mm	2.65 mm	1.1 mm	1 mm	2 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
标称供电电压 (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
表面贴装	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING
端子节距	0.65 mm	0.65 mm	1.27 mm	0.65 mm	0.5 mm	0.65 mm
端子位置	DUAL	DUAL	DUAL	DUAL	QUAD	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED	30	30	NOT SPECIFIED	30	30
宽度	4.4 mm	5.3 mm	7.5 mm	4.4 mm	2.5 mm	5.3 mm
Base Number Matches	1	1	1	1	1	1
是否Rohs认证	符合	符合	-	符合	符合	符合
厂商名称	Nexperia	Nexperia	-	Nexperia	Nexperia	Nexperia
Samacsys Description	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger (3-state)@en-us	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger (3-state)@en-us	-	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger (3-state)@en-us	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger (3-state)@en-us	74LVC574A - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger (3-state)@en-us
其他特性	BROADSIDE VERSION OF 374	BROADSIDE VERSION OF 374	BROADSIDE VERSION OF 374	BROADSIDE VERSION OF 374	-	BROADSIDE VERSION OF 374

74LVC574APW,112

74LVC574APW,112概述

74LVC574APW,112规格参数

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