TB7101AF(T5L1.2,F)/(T5L1.5,F)/(T5L1.8,F)/(T5L3.3,F)
Toshiba BiCD Integrated Circuit
Silicon Monolithic
TB7101AF(T5L1.2,F),TB7101AF(T5L1.5,F)
TB7101AF(T5L1.8,F),TB7101AF(T5L3.3,F)
Buck DC-DC Converter IC
The TB7101AF is a single-chip buck DC-DC converter IC. The
TB7101AF contains high-speed and low-on-resistance power
MOSFETs for the main switch and synchronous rectifier to
achieve high efficiency.
Features
•
•
•
•
•
•
•
•
Enables up to 1 A of load current (I
OUT
) with a minimum of
external components.
Fixed output voltage: V
OUT
=
1.2 V/1.5 V/1.8 V/3.3 V (typ.)
A high 1-MHz oscillation frequency (typ.) allows the use of
small external components.
Uses only an inductor and two capacitors to achieve high efficiency.
Allows the use of a small surface-mount ceramic capacitor as an output filter capacitor.
Enable threshold voltage : V
IH(EN)
=
1.5 V, V
IL(EN)
=
0.5 V(@V
IN
=
5 V)
Housed in a small surface-mount package (PS-8) with a low thermal resistance.
Undervoltage lockout (UVLO), thermal shutdown (TSD) and overcurrent protection (OCP)
Weight: 0.017 g (typ.)
Parts Marking
Product
TB7101AF
(T5L1.2, F)
TB7101AF
(T5L1.5, F)
TB7101AF
(T5L1.8, F)
TB7101AF
(T5L3.3, F)
*:
Output
Voltage (V)
1.2
1.5
1.8
3.3
Parts
Marking
7101F
7101G
Parts Marking
Lot No.
Pin Assignment
L
X
8
V
FB
7
N.C.
6
N.C.
5
*
7101H
7101K
The dot (•) on the top surface indicates pin 1.
1
PGND
2
V
IN
3
EN
4
SGND
The lot number consists of three digits. The first digit represents the last digit of the year of manufacture, and the
following two digits indicates the week of manufacture between 01 and either 52 or 53.
Manufacturing week code
(The first week of the year is 01; the last week is 52 or 53.)
Manufacturing year code (last digit of the year of manufacture)
This product has a MOS structure and is sensitive to electrostatic discharge. Handle with care.
The product(s) in this document (“Product”) contain functions intended to protect the Product from temporary
small overloads such as minor short-term overcurrent, or overheating. The protective functions do not necessarily
protect Product under all circumstances. When incorporating Product into your system, please design the system (1)
to avoid such overloads upon the Product, and (2) to shut down or otherwise relieve the Product of such overload
conditions immediately upon occurrence. For details, please refer to the notes appearing below in this document and
other documents referenced in this document.
Start of commercial production
2008-05
1
2013-11-01
TB7101AF(T5L1.2,F)/(T5L1.5,F)/(T5L1.8,F)/(T5L3.3,F)
Ordering Information
Part Number
TB7101AF (T5L*.*, F)
Shipping
Embossed tape (3000 units per reel)
Block Diagram
V
IN
EN
Undervoltage
lockout & soft-start
reference voltage
Current detection
Oscillator
PWM comparator
Control logic
Driver
L
X
Slope
compensation
Driver
V
FB
Error amplifier
0.8V (typ.)
Phase
compensation
V
COMP
Thermal
shutdown
PGND
SGND
Pin Description
Pin No.
1
2
Symbol
PGND
V
IN
EN
SGND
N.C.
N.C.
V
FB
L
X
Ground for the output section
Input pin
This pin is placed in the standby state if V
EN
=
low. Standby current is 1
μA
or less.
Enable pin
When EN
≥
1.5 V (@V
IN
=
5 V), the control logic is allowed to operate and thus enable the switching
operation of the output section.
Ground for the control logic
No-connect
No-connect
Feedback pin
Output voltage is set to 1.2 V/1.5 V/1.8 V/3.3 V (typ.) internally.
Switch pin
This output is connected to the high-side P-channel MOSFETs and low-side N-channel MOSFET.
Description
3
4
5
6
7
8
2
2013-11-01
TB7101AF(T5L1.2,F)/(T5L1.5,F)/(T5L1.8,F)/(T5L3.3,F)
Timing Chart
Normal Operation
OSC
0
I
OUT
V
OUT
0
0
V
COMP
0
I
L
0
V
LX
T
ON
T
OSC : Internal oscillator output signal
I
OUT
: Converter output current
V
OUT
: Converter output voltage
V
COMP
: Output voltage of error amplifier
: Inductor current
I
L
: Switch pin voltage
V
LX
3
2013-11-01
TB7101AF(T5L1.2,F)/(T5L1.5,F)/(T5L1.8,F)/(T5L3.3,F)
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Input voltage
Enable pin voltage
V
EN
−V
IN
voltage difference
Feedback pin voltage
Switch pin voltage
Switch pin current
Power dissipation
(Note 1)
Symbol
V
IN
V
EN
V
EN
−
V
IN
V
FB
V
LX
I
LX
P
D
T
jopr
T
j
T
stg
Rating
−0.3
to 6
−0.3
to 6
V
EN
−
V
IN
<
0.3
−0.3
to 6
−0.3
to 6
±1.3
0.7
−40
to 125
150
−55
to 150
Unit
V
V
V
V
V
A
W
°C
°C
°C
Operating junction temperature
Junction temperature
Storage temperature
(Note 2)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc)
Thermal Resistance Characteristic
Characteristics
Thermal resistance, junction and ambient
Symbol
R
th
(j-a)
Max
178.6 (Note 1)
Unit
°C/W
Note 1:
Glass epoxy board
Material: FR-4
25.4
×
25.4
×
0.8
(Unit: mm)
Note 2: The TB7101AF may go into thermal shutdown at the rated maximum junction temperature. Thermal design is
required to ensure that the rated maximum operating junction temperature, T
jopr
, will not be exceeded.
4
2013-11-01
TB7101AF(T5L1.2,F)/(T5L1.5,F)/(T5L1.8,F)/(T5L3.3,F)
Electrical Characteristics
(unless otherwise specified: T
j
=
25°C and V
IN
=
2.7 to 5.5 V)
TB7101AF (T5L1.2, F)
Characteristics
Operating input voltage
Operating current
Standby current
Symbol
V
IN (OPR)
I
IN1
I
IN2
I
IN (STBY)
V
IH (EN) 1
EN threshold voltage
V
IH (EN) 2
V
IL (EN) 1
V
IL (EN) 2
EN input current
I
IH (EN) 1
I
IH (EN) 2
V
FB1
V
FB2
R
DS (ON) (H)
R
DS (ON) (L)
I
LEAK (H)
I
LEAK (L)
f
osc1
f
osc2
t
ss1
t
ss2
Detection
temperature
Hysteresis
Detection voltage
Undervoltage
lockout (UVLO)
LX current limit
Recovery voltage
Hysteresis
T
SD
ΔT
SD
V
UV
V
UVR
ΔV
UV
I
LIM
Test Condition
⎯
V
IN
=
5 V, V
EN
=
5 V, V
FB
=
5 V
V
IN
=
2.7 V, V
EN
=
2.7 V, V
FB
=
2.7 V
V
IN
=
5 V, V
EN
=
0 V, V
FB
=
0 V
V
IN
=
5 V
V
IN
=
2.7 V
V
IN
=
5 V
V
IN
=
2.7 V
V
IN
=
5 V, V
EN
=
5 V
V
IN
=
2.7 V, V
EN
=
2.7 V
V
IN
=
5 V, V
EN
=
5 V, I
OUT
=
10 mA
V
IN
=
2.7 V, V
EN
=
2.7 V, I
OUT
=
10 mA
V
IN
=
5 V, V
EN
=
5 V, I
LX
= −0.5
A
V
IN
=
5 V, V
EN
=
5 V, I
LX
=
0.5 A
V
IN
=
5 V, V
EN
=
0 V, V
LX
=
0 V
V
IN
=
5 V, V
EN
=
0 V, V
LX
=
5 V
V
IN
=
5 V, V
EN
=
5 V
V
IN
=
2.7 V, V
EN
=
2.7 V
V
IN
=
5 V, V
EN
=
5 V, I
OUT
=
0 A
V
IN
=
2.7 V, V
EN
=
2.7 V, I
OUT
=
0 A
V
IN
=
5 V
V
IN
=
5 V
V
IN
=
V
EN
V
IN
=
V
EN
V
IN
=
V
EN
V
IN
=
5 V
Min
2.7
⎯
⎯
⎯
1.5
1.5
⎯
⎯
7.6
4.1
1.164
1.164
⎯
⎯
⎯
⎯
0.85
0.85
1
1.4
⎯
⎯
2.2
2.3
⎯
1.3
Typ.
⎯
0.68
0.55
⎯
⎯
⎯
⎯
⎯
⎯
⎯
1.2
1.2
0.27
0.27
⎯
⎯
1
1
2
2.4
160
20
2.4
2.5
0.1
2.8
Max
5.5
0.9
0.69
1
⎯
⎯
0.5
0.5
12.4
6.7
1.236
1.236
⎯
⎯
−1
1
1.15
1.15
⎯
⎯
⎯
⎯
2.6
2.7
⎯
⎯
Unit
V
mA
mA
μA
V
V
V
V
μA
μA
V
V
Ω
Ω
μA
μA
MHz
MHz
ms
ms
°C
°C
V
V
V
A
VFB input voltage
High-side switch on-state resistance
Low-side switch on-state resistance
High-side switch leakage current
Low-side switch leakage current
Oscillation frequency
Soft-start time
Thermal
shutdown (TSD)
Note on Electrical Characteristics
The test condition T
j
=
25°C means a state where any drifts in electrical characteristics incurred by an increase in
the chip’s junction temperature can be ignored during pulse testing.
5
2013-11-01
微控制器 MCU
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