SiHF12N60E
www.vishay.com
Vishay Siliconix
E Series Power MOSFET
TO-220 FULLPAK
D
FEATURES
• Low figure-of-merit (FOM) R
on
x Q
g
• Low input capacitance (C
iss
)
• Reduced switching and conduction losses
G
• Ultra low gate charge (Q
g
)
• Avalanche energy rated (UIS)
S
Available
G D S
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
N-Channel MOSFET
APPLICATIONS
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. () at 25 °C
Q
g
max. (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
58
6
13
Single
650
0.38
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Renewable energy
- Solar (PV inverters)
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
TO-220 FULLPAK
SiHF12N60E-GE3
SiHF12N60E-E3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150 °C)
e
Pulsed Drain Current
a
SYMBOL
V
DS
V
GS
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
I
D
I
DM
E
AS
P
D
T
J
, T
stg
T
J
= 125 °C
For 10 s
M3 screw
dV/dt
LIMIT
600
± 30
12
7.8
27
0.26
117
33
-55 to +150
70
5
300
0.6
UNIT
V
A
W/°C
mJ
W
°C
V/ns
°C
Nm
Linear Derating Factor
Single Pulse Avalanche Energy
b
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode
dV/dt
d
Soldering Recommendations (Peak temperature)
c
Mounting Torque
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 11.6 mH, R
g
= 25
,
I
AS
= 4.5 A.
c. 1.6 mm from case.
d. I
SD
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
e. Limited by maximum junction temperature.
S16-1602-Rev. F, 15-Aug-16
Document Number: 91481
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF12N60E
www.vishay.com
Vishay Siliconix
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
65
3.8
UNIT
°C/W
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance, Energy
Related
a
Effective Output Capacitance, Time
Related
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Input Resistance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
o(er)
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
GS
= ± 30 V
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 6 A
V
DS
= 40 V, I
D
= 8 A
MIN.
600
-
2
-
-
-
-
-
-
-
-
-
-
TYP.
-
0.71
-
-
-
-
-
0.32
3.8
937
53
5
41
136
29
6
13
14
19
35
19
1.1
MAX.
-
-
4
± 100
±1
1
10
0.38
-
-
-
-
UNIT
V
V/°C
V
nA
μA
μA
S
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
pF
-
-
58
-
-
28
38
70
38
-
ns
nC
V
DS
= 0 V to 480 V, V
GS
= 0 V
C
o(tr)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
f = 1 MHz, open drain
V
DD
= 480 V, I
D
= 6 A,
V
GS
= 10 V, R
g
= 9.1
V
GS
= 10 V
I
D
= 6 A, V
DS
= 480 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
350
4
19
12
A
48
1.2
-
-
-
V
ns
μC
A
G
S
T
J
= 25 °C, I
S
= 6 A, V
GS
= 0 V
T
J
= 25 °C, I
F
= I
S
= 6 A,
dI/dt = 100 A/μs, V
R
= 25 V
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
b. C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
S16-1602-Rev. F, 15-Aug-16
Document Number: 91481
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF12N60E
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Vishay Siliconix
30
I
D
, Drain-to-Source Current (A)
R
DS(on)
, Drain-to-Source
On Resistance (Normalized)
TOP 15 V
14 V
13 V
25
12 V
11 V
10 V
20
9V
15
10
5
0
0
5
10
15
20
7V
3
I
D
= 6 A
2.5
2
1.5
1
0.5
0
- 60 - 40 - 20 0
V
GS
= 10 V
8V
T
J
= 25 °C
6V
5V
25
30
20 40 60 80 100 120 140 160
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
T
J
, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
20
I
D
, Drain-to-Source Current (A)
16
Capacitance (pF)
12
TOP 15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
10 000
T
J
= 150 °C
7V
1000
C
iss
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
6V
100
C
oss
8
5V
4
10
C
rss
0
0
5
10
15
20
25
30
1
0
100
200
300
400
500
600
V
DS
, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
V
DS
, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
30
8
7
I
D
, Drain-to-Source Current (A)
25
T
J
= 150 °C
20
C
oss
(pF)
2000
6
5
15
10
T
J
= 25 °C
5
0
4
C
oss
200
E
oss
3
2
1
20
0
0
100
200
300
V
DS
400
500
600
0
5
10
15
20
25
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
S16-1602-Rev. F, 15-Aug-16
Fig. 6 - C
oss
and E
oss
vs. V
DS
Document Number: 91481
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
E
oss
(μJ)
SiHF12N60E
www.vishay.com
Vishay Siliconix
15
24
V
GS
,
Gate-to-Source
Voltage (V)
20
16
12
8
4
0
0
10
20
I
D
, Drain Current (A)
V
DS
= 480 V
V
DS
= 300 V
V
DS
= 120 V
12
9
6
3
0
30
40
50
60
25
50
75
100
125
150
Q
g
, Total
Gate
Charge (nC)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
100
T
J
, Case Temperature (°C)
Fig. 10 - Maximum Drain Current vs. Case Temperature
750
725
I
SD
, Reverse Drain Current (A)
V
DS
, Drain-to-Source
Breakdown Voltage (V)
V
GS
= 0 V
700
675
650
625
600
575
550
525
10
T
J
= 150 °C
T
J
= 25 °C
1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
V
SD
,
Source-Drain
Voltage (V)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
T
J
, Junction Temperature (°C)
Fig. 11 - Temperature vs. Drain-to-Source Voltage
1000
Operation in this Area
Limited by R
DS(on)
I
DM
= Limited
I
D
, Drain Current (A)
100
10
100 μs
1
Limited by R
DS(on)
*
1 ms
0.1
T
C
= 25 °C
T
J
= 150 °C
Single
Pulse
1
10
BVDSS Limited
10 ms
0.01
100
1000
V
DS
, Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
Fig. 9 - Maximum Safe Operating Area
S16-1602-Rev. F, 15-Aug-16
Document Number: 91481
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF12N60E
www.vishay.com
Vishay Siliconix
1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
0.2
0.1
0.1
0.05
0.02
Single
Pulse
0.01
0.0001
0.001
0.01
Pulse Time (s)
0.1
1
10
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
R
D
V
DS
V
GS
R
G
V
DS
t
p
V
DD
+
-
V
DD
D.U.T.
V
DS
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
I
AS
Fig. 13 - Switching Time Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
V
DS
90 %
10 V
Q
GS
Q
G
Q
GD
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
G
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
50 kΩ
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
D.U.T
I
AS
+
-
12 V
0.2 µF
0.3 µF
V
DD
D.U.T.
+
-
V
DS
10 V
t
p
0.01
Ω
V
GS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
I
G
I
D
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S16-1602-Rev. F, 15-Aug-16
Document Number: 91481
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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