74LX1G132
SINGLE 2-INPUT SCHMITT NAND GATE
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED: t
PD
= 5.5ns (MAX.) at V
CC
= 3V
LOW POWER DISSIPATION:
I
CC
= 1µA (MAX.) at T
A
= 25°C
TYPICAL HYSTERESIS: V
h
=1V at V
CC
=4.5V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
IMPROVED LATCH-UP IMMUNITY
SOT23-5L
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
DESCRIPTION
The 74LX1G132 is a low voltage CMOS SINGLE
2-INPUT NAND GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
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PIN CONNECTION AND IEC LOGIC SYMBOLS
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Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All inputs and outputs are equipped with
protection circuits against static discharge.
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SOT323-5L
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T&R
74LX1G132STR
74LX1G132CTR
April 2004
1/11
74LX1G132
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN N°
1
2
4
3
5
SYMBOL
1A
1B
1Y
GND
V
CC
NAME AND FUNCTION
Data Input
Data Input
Data Output
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
O
Supply Voltage
DC Input Voltage
b
O
et
l
so
I
OK
T
L
DC Output Voltage (V
CC
= 0V)
DC Output Voltage (High or Low State) (note 1)
DC Input Diode Current
DC Output Diode Current (note 2)
DC Output Current
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P
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t(
O
-
so
b
L
L
H
H
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P
B
L
H
L
H
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s)
t(
Y
H
H
H
L
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 50
- 50
±
50
±
50
-65 to +150
300
Unit
V
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current per Supply Pin
Storage Temperature
T
stg
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
1) I
O
maximum rating must be observed
2) V
O
< GND, V
O
> V
CC
2/11
74LX1G132
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
V
O
I
OH
, I
OL
I
OH
, I
OL
I
OH
, I
OL
I
OH
, I
OL
I
OH
, I
OL
T
op
Supply Voltage (note 1)
Input Voltage
Output Voltage (V
CC
= 0V)
Output Voltage (High or Low State)
High or Low Level Output Current (V
CC
= 4.5 to 5.5V)
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
High or Low Level Output Current (V
CC
= 2.7 to 3.0V)
High or Low Level Output Current (V
CC
= 2.3 to 2.7V)
High or Low Level Output Current (V
CC
= 1.65 to 2.3V)
Operating Temperature
Parameter
Value
1.65 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
±
32
±
24
±
12
±
8
±
4
-55 to 125
Unit
V
V
V
V
mA
mA
mA
mA
mA
°C
1) Truth Table guaranteed: 1.2V to 3.6V
bs
O
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(s
t
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O
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P
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od
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s)
(
3/11
74LX1G132
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
4.5 to 5.5
C
L
(pF)
R
L
(Ω)
t
s
=
t
r
(ns)
-40 to 85 °C
Min.
2
2
1
1
2
2
1
1
1
Max.
12.0
7.0
6.0
5.5
11.0
6.5
6.5
5.5
5.0
Value
-55 to 125 °C
Min.
2
2
1
1
2
2
1
1
1
Max.
12.0
7.0
6.0
5.5
11.0
6.5
6.5
5.5
5.0
Unit
t
PLH
t
PHL
Propagation Delay
Time
15
1MΩ
3.0
30
30
50
50
50
1000
500
500
500
500
2.0
2.0
2.5
2.5
2.5
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
0
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
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)-
(s
t
1.8
2.5
3.3
b
O
so
te
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ro
P
Min.
uc
d
5
20
21
22
s)
t(
ns
Value
Unit
Max.
pF
pF
T
A
= 25 °C
Typ.
f
IN
= 10MHz
5/11
FPGA/CPLD
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