PL
IA
Features
■
■
■
NT
HIGH PERFORMANCE TERMINATION
NETWORK
Miniaturized circuitry and packaging
for space reduction
Designed for gigabit communication
networks
CO
M
■
■
*R
oH
Controlled impedance
RoHS compliant*
S
CAT16-PC2F6LF - Concave Chip Array
Electrical Characteristics
Resistance
R1 .............................................100 ohms
R2 .............................................187 ohms
Tolerance ............................................±1 %
TCR........................................±200 ppm/ ˚C
Temperature Range .........-55 ˚C to +125 ˚C
Max. Operating Voltage ....................5 VDC
Max. Power Resistance ................ .0625 W
Solderability .....................>95 % Coverage
Product Dimensions
8
.60
±
.10
(.024
±
.004)
.45
±
.10
(.018
±
.004)
7
6
5
.30
±
.10 DIA.
(.012
±
.004)
.40
±
.10
(.016
±
.004)
1.60
±
.15
(.063
±
.060)
.80
±
.10
(.031
±
.004)
For Standard Values Used in Capacitors,
Inductors, and Resistors,
click here.
DIMENSIONS ARE:
MM
(INCHES)
3.20
±
.15
(.126
±
.006)
.40
±
.10
(.016
±
.004)
1
2
3
4
Packaging Specifications
5000 pcs - per 7 " reel
1.9
±
.15
(.075
±
.006)
4.0
±
.10
(.157
±
.004)
2.0
±
.05
(.079
±
.002)
1.1
(.043)
13
±
0.5
DIA.
(.512
±
.020)
60.0
±
1.0
DIA.
(2.36
±
.039)
8.0
±
.05
(.138
±
.012)
21
±
0.5
(.827
±
.020)
12.5
±
2
(.492
±
.079)
178.0
±
2.0
(7.008
±
.080)
7.2
±
.20
(.283
±
.008)
3.5
±
.05
(.138
±
.002)
4.0
±.10
(.158
±.004)
1.5 +.10/-0
(.060 +.004/-0)
1.75
±
.10
(.069
±
.004)
10.0
±
1.5
(.394
±
.059)
Derating Curve
Rated power in percentage (%)
Land Pattern
Solder resist
100
80
60
40
20
0
-55
0
70
(ϒ Ambient temperature
C)
125
0.7 to 0.9
(.028 to .035)
Land
Chip resistor array CAT
2.0 to 2.2
(.079 to .087)
Schematic
8
R2
R1
R1
R1
0.4 to 0.45
(.016 to .0178)
0.80
(.032)
7
6
R2
R1
5
REV. 11/06
1
2
3
4
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex.
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
FPGA/CPLD
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