June 9, 2016
IRS21814MPBF
HIGH- AND LOW-SIDE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt
immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V and 5 V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5 V offset
Lower di/dt gate driver for better noise immunity
Output source/sink current capability (min) 1.4
A/1.8 A
Leadfree, RoHS compliant
Product Summary
Topology
V
OFFSET
V
OUT
I
o+
& I
o-
(typical)
t
ON
& t
OFF
(typical)
High and Low Side Driver
≤ 600 V
10 V – 20 V
1.9 A &2.3 A
180 ns & 220 ns
Package Options
MLPQ4x4 16- Leads
(Without 2 leads)
Typical Connection
Up to 600V
IR21814MPBF
Vcc
HIN
LIN
Vss
Vcc
HIN
LIN
HO
V
B
V
S
TO
LOAD
Vss
COM
LO
(Refer to Lead Assignments for correct pin configuration) This diagram shows electrical connections only. Please refer
to our Application Notes and Design Tips for proper circuit board layout.
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© 2016 International Rectifier
IRS21814MPBF
Description
The IRS21814MPBF is a high voltage, high speed power MOSFET and IGBT drivers with independent high-
and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output,
down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver
cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the
high-side configuration which operates up to 600 V.
Feature Comparison: IRS2181(4)/IRS2183(4)/IRS2184(4)
Part
Input
Logic
Cross-
Conduction
Prevention
logic
no
yes
yes
Dead-Time
Ground
Pins
COM
V
SS
/COM
COM
V
SS
/COM
COM
V
SS
/COM
Ton/Toff
2181
21814
2183
21834
2184
21844
HIN/LIN
HIN/LIN
IN/SD
none
Internal 500ns
Programmable 0.4 – 5 us
Internal 500ns
Programmable 0.4 – 5 us
180/220 ns
180/220 ns
680/270 ns
Qualification Information
†
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
IC Latch-Up Test
RoHS Compliant
†
††
Industrial
(per JEDEC JESD 47)
Comments: This IC has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
†††
MSL2
MLPQ4x4 14L
(per IPC/JEDEC J-STD-020)
Class A (+/-150V)
(per JEDEC standard JESD22-A115)
Class 1B (+/-1000V)
(per EIA/JEDEC standard EIA/JESD22-A114)
Class III (+/-1000V)
(per JEDEC standard JESD22-C101)
Class II, Level A
(per JESD78A)
Yes
††
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/
Higher qualification ratings may be available should the user have such requirements. Please
contact your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
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© 2016 International Rectifier
2
IRS21814MPBF
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation
ratings are measured under board mounted and still air conditions.
Symbol
Definition
Min
Max
Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
V
SS
dV
S
/dt
P
D
Rth
JA
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (HIN &LIN)
Logic ground
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ 25°C
Thermal resistance, junction to ambient
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
V
SS
-0.3
V
CC
- 20
—
—
—
625
V
B
+ 0.3
V
B
+ 0.3
20 †
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
2.08
36
150
150
300
V/ns
W
°C/W
°C
V
T
J
Junction temperature
—
T
S
Storage temperature
-50
T
L
Lead temperature (soldering, 10 seconds)
—
† All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used
within the recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15 V
differential.
Symbol
Definition
Min
Max
Units
V
B
High-side floating supply absolute voltage
V
S
+10
V
S
+20
V
S
High-side floating supply offset voltage
††
600
V
HO
High-side floating output voltage
V
S
V
B
V
CC
Low-side and logic fixed supply voltage
10
20
V
V
LO
Low-side output voltage
0
V
CC
V
IN
Logic input voltage
V
SS
V
CC
V
SS
Logic ground
-5
5
T
A
Ambient temperature
-40
125
°C
†† Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to –V
BS
. (Please refer to the
Design Tip DT97-3 for more details).
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© 2016 International Rectifier
3
IRS21814MPBF
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, C
L
= 1000 pF,T
A
= 25°C unless otherwise specified.
Symbol
Definition
Min Typ Max Units Test Conditions
t
on
Turn-on propagation delay
— 180 270
V
S
= 0 V
V
S
= 0 V or 600 V
t
off
Turn-off propagation delay
— 220 330
ns
MT
Delay matching, HS & LS turn-on/off
—
—
35
t
r
Turn-on rise time
—
40
60
V
S
= 0 V
t
f
Turn-off fall time
—
20
35
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, T
A
= 25°C unless otherwise specified. The V
IL,
V
IH
and I
IN
parameters
are referenced to V
SS
/COM and are applicable to the respective input leads: HIN and LIN. The V
O,
I
O
and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage
Logic “0” input voltage
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage positive
going threshold
V
CC
and V
BS
supply undervoltage negative
going threshold
V
CC
and V
BS
supply undervoltage Hysteresis
Output high short circuit pulsed current
Output low short circuit pulsed current
Min Typ Max Units Test Conditions
2.5 —
—
— — 0.8
— — 1.4
— — 0.2
— — 50
20 60 150
50 120 240
— 25 60
— — 1.0
8.0
7.4
0.3
1.4
1.8
8.9
8.2
0.7
1.9
2.3
9.8
9.0
—
—
A
—
V
O
= 0 V,
PW ≤ 10 us
V
O
= 15 V,
PW ≤ 10 us
V
V
CC
= 10 V to 20 V
V
CC
= 10 V to 20 V
I
O
= 0 mA
I
O
= 20 mA
V
B
= V
S
= 600 V
V
IN
= 0 V or 5 V
V
IN
= 5 V
V
IN
= 0 V
V
µA
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© 2016 International Rectifier
4
IRS21814MPBF
Functional Block Diagrams: IRS21814
VB
IRS21814
HV
LEVEL
SHIFTER
HIN
UV
DETECT
R
R
PULSE
FILTER
S
Q
HO
VSS COM
/
LEVEL
SHIFT
PULSE
GENERATOR
VS
VCC
UV
DETECT
LO
LIN
VSSCOM
/
LEVEL
SHIFT
DELAY
COM
VSS
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© 2016 International Rectifier
5