INTEGRATED CIRCUITS
74LVT00
3.3V Quad 2-input NAND gate
Product specification
IC24 Data Handbook
1996 Aug 15
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V Quad 2-input NAND gate
74LVT00
QUICK REFERENCE DATA
SYMBOL
PARAMETER
Propagation delay
An or Bn
to Yn
Input capacitance
Total supply current
CONDITIONS
T
amb
= 25°C;
GND = 0V
C
L
= 50pF;
V
CC
= 3.3V
V
I
= 0V or 3.0V
Outputs Low; V
CC
= 3.6V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
I
CCL
2.7
2.7
3
1
ns
pF
mA
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP
14-Pin Plastic TSSOP
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVT00 D
74LVT00 DB
74LVT00 PW
NORTH AMERICA
74LVT00 D
74LVT00 DB
74LVT00PW DH
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
LOGIC SYMBOL
1
2
4
5
9
10 12 13
PIN CONFIGURATION
A0
B0
Y0
A0 B0 A1 B1 A2 B2
A3 B3
A1
B1
Y0 Y1 Y2 Y3
Y1
GND
4
5
6
7
11
10
9
8
Y3
B2
A2
Y2
1
2
3
14
13
12
V
CC
B3
A3
V
CC
= Pin 14
GND = Pin 7
3
6
8
11
SA00333
SA00334
PIN DESCRIPTION
LOGIC SYMBOL (IEEE/IEC)
1
2
PIN
NUMBER
3
SYMBOL
An-Bn
Yn
GND
V
CC
NAME AND FUNCTION
Data inputs
Data outputs
Ground (0V)
Positive supply voltage
&
1, 2, 4, 5, 9,
10, 12, 13
3, 6, 8, 11
6
4
5
7
14
9
8
10
12
11
13
SF00004
1996 Aug 15
2
853-1858 17183
Philips Semiconductors
Product specification
3.3V Quad 2-input NAND gate
74LVT00
LOGIC DIAGRAM
A0
B0
A1
B1
A2
B2
V
CC
= Pin 14
GND = Pin 7
A3
B3
1
2
4
5
9
10
12
13
11
3
Y0
FUNCTION TABLE
INPUTS
Dna
L
L
8
Y2
OUTPUT
Dnb
L
H
L
Qn
H
H
H
L
6
Y1
H
Y3
SA00360
H
H
NOTES:
H = High voltage level
L = Low voltage level
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Output in Low state
Storage temperature range
64
–65 to 150
°C
V
O
< 0
Output in Off or High state
Output in High state
V
I
< 0
CONDITIONS
RATING
–0.5 to +4.6
–50
–0.5 to +7.0
–50
–0.5 to +7.0
–32
mA
UNIT
V
mA
V
mA
V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
–40
PARAMETER
MIN
2.7
0
2.0
0.8
–20
32
10
+85
MAX
3.6
5.5
V
V
V
V
mA
mA
ns/V
°C
UNIT
1996 Aug 15
3
Philips Semiconductors
Product specification
3.3V Quad 2-input NAND gate
74LVT00
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions
Voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
MIN
V
IK
Input clamp voltage
V
CC
= 2.7V; I
IK
= –18mA
V
CC
= 2.7 to 3.6V; I
OH
= –100µA
V
OH
High-level output voltage
V
CC
= 2.7V; I
OH
= –6mA
V
CC
= 3.0V; I
OH
= –20mA
V
CC
= 2.7V; I
OL
= 100µA
V
OL
Low-level output voltage
V
CC
= 2.7V; I
OL
= 24mA
V
CC
= 3.0V; I
OL
= 32mA
I
I
I
OFF
I
CCH
Quiescent supply current
I
CCL
∆I
CC
C
I
Additional supply current per input pin
2
Input capacitance
Input leakage current
Output off current
V
CC
= 0 or 3.6V; V
I
= 5.5V
V
CC
= 3.6V; V
I
= V
CC
or GND
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
V
CC
= 3.6V; Outputs High, V
I
= GND or
V
CC,
I
O =
0
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
V
CC
= 3V to 3.6V; One input at V
CC
–0.6V,
Other inputs at V
CC
or GND
V
I
= 3V or 0
3
1
V
CC
–0.2
2.4
2.0
0.2
0.5
0.5
10
±1
±100
0.02
mA
2
0.2
µA
pF
µA
A
µA
V
V
TYP
1
MAX
–1.2
V
UNIT
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
2. This is the increase in supply current for each input at the specificed voltage level other than V
CC
or GND.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500Ω; T
amb
= –40°C to +85°C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
MIN
t
PLH
t
PHL
Propagation delay
An or Bn to Yn
1
1.0
1.0
V
CC
= 3.3V
±
0.3V
TYP
1
2.7
2.7
MAX
4.1
3.9
V
CC
= 2.7V
MAX
5.0
3.8
ns
UNIT
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 2.7V
A
n
, B
n
V
M
t
PHL
V
M
t
PLH
Yn
V
M
V
M
SF01395
Waveform 1. Propagation delay for inverting outputs
1996 Aug 15
4
Philips Semiconductors
Product specification
3.3V Quad 2-input NAND gate
74LVT00
TEST CIRCUIT AND WAVEFORMS
V
CC
90%
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
C
L
R
L
POSITIVE
PULSE
V
OUT
V
M
10%
t
THL
(t
F
)
t
TLH
(t
R
)
90%
V
M
t
W
90%
V
M
10%
0V
10%
0V
t
TLH
(t
R
)
t
THL
(t
F
)
AMP (V)
t
W
V
M
90%
AMP (V)
Test Circuit for Outputs
10%
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R
L
= Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude
74LVT
2.7V
Rep. Rate
≤10MHz
t
W
t
R
t
F
500ns
≤2.5ns ≤2.5ns
SV00022
1996 Aug 15
5
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