74ACTQ14 Quiet Series™ Hex Inverter with Schmitt Trigger Input
May 2007
74ACTQ14
Quiet Series™ Hex Inverter with Schmitt Trigger Input
Features
■
I
CC
reduced by 50%
■
Guaranteed simultaneous switching noise level and
tm
General Description
The ACTQ14 contains six inverter gates each with a
Schmitt trigger input. They are capable of transforming
slowly changing input signals into sharply defined, jitter-free
output signals. In addition, they have a greater noise margin
than conventional inverters.
The ACTQ14 utilizes Fairchild Quiet Series™ Technology
to guarantee quiet output switching and improve dynamic
threshold performance. FACT Quiet Series™ features
GTO™ output control and undershoot corrector in addition
to a split ground bus for superior performance.
The ACTQ14 has hysteresis between the positive-going
and negative-going input thresholds (typically 1.0V) which is
determined internally by transistor ratios and is essentially
insensitive to temperature and supply voltage variations.
dynamic threshold performance
■
Improved latch-up immunity
■
Guaranteed pin-to-pin skew AC performance
■
Outputs source/sink 24mA
Ordering Information
Order
Number
74ACTQ14SC
74ACTQ14MTC
Package
Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Descriptions
Pin Names
I
n
O
n
Inputs
Outputs
Description
Function Table
Input (A)
L
H
Output (O)
H
L
FACT™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
©1991 Fairchild Semiconductor Corporation
74ACTQ14 Rev. 1.5
www.fairchildsemi.com
74ACTQ14 Quiet Series™ Hex Inverter with Schmitt Trigger Input
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
Supply Voltage
DC Input Diode Current
V
I
=
–0.5V
V
I
=
V
CC
+ 0.5V
V
I
I
OK
DC Input Voltage
DC Output Diode Current
V
O
=
–0.5V
V
O
=
V
CC
+ 0.5V
V
O
I
O
DC Output Voltage
Parameter
Rating
–0.5V to +7.0V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
±50mA
±50mA
–65°C to +150°C
±300mA
140°C
DC Output Source or Sink Current
I
CC
or I
GND
DC V
CC
or Ground Current per Output Pin
T
STG
Storage Temperature
DC Latch-Up Source or Sink Current
T
J
Junction Temperature
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
I
V
O
T
A
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Parameter
Rating
4.5V to 5.5V
0V to V
CC
0V to V
CC
–40°C to +85°C
©1991 Fairchild Semiconductor Corporation
74ACTQ14 Rev. 1.5
www.fairchildsemi.com
2
74ACTQ14 Quiet Series™ Hex Inverter with Schmitt Trigger Input
DC Electrical Characteristics
T
A
=
+25°C T
A
=
–40°C to +85°C
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Conditions
V
OUT
=
0.1V
or V
CC
– 0.1V
V
OUT
=
0.1V
or V
CC
– 0.1V
I
OUT
=
–50µA
V
IN
=
V
IL
or V
IH
:
Typ
1.5
1.5
1.5
1.5
4.49
5.49
Guaranteed Limits
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1.0
1.4
1.6
0.4
0.5
2.0
2.0
0.8
0.8
1.5
75
–75
2.0
20.0
Units
V
V
V
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
4.5
5.5
I
OH
=
–24mA
I
OH
=
–24mA
(1)
I
OUT
=
50µA
V
IN
=
V
IL
or V
IH
:
0.001
0.001
I
OL
=
24mA
I
OL
=
24mA
(1)
V
I
=
V
CC
, GND
T
A
=
Worst Case
T
A
=
Worst Case
T
A
=
Worst Case
T
A
=
Worst Case
V
I
=
V
CC
– 2.1V
V
OLD
=
1.65V Max.
V
OHD
=
3.85V Min.
V
IN
=
V
CC
or GND
Figures 1 & 2
(3)
Figures 1 & 2
(3)
(4)
0.1
0.1
0.36
0.36
±0.1
1.4
1.6
0.4
0.5
2.0
2.0
0.8
0.8
V
4.5
5.5
I
IN
V
h(max)
V
h(min)
V
t
+
V
t
–
I
CCT
I
OLD
I
OHD
I
CC
V
OLP
V
OLV
V
IHD
V
ILD
Maximum Input
Leakage Current
Maximum Hysteresis
Minimum Hysteresis
Maximum Positive
Threshold
Minimum Negative
Threshold
Maximum I
CC
/Input
Minimum Dynamic
Output Current
(2)
Maximum Quiescent
Supply Current
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
5.5
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
5.5
5.5
5.5
5.5
5.0
5.0
5.0
5.0
µA
V
V
V
V
mA
mA
mA
µA
V
V
V
V
0.6
1.1
–0.6
1.9
1.2
1.5
–1.2
2.2
0.8
(4)
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. Maximum test duration 2.0ms, one output loaded at a time.
3. Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND.
4. Max number of data inputs (n) switching. (n–1) inputs switching 0V to 3V. Input-under-test switching:
3V to threshold (V
ILD
), 0V to threshold (V
IHD
), f
=
1MHz.
©1991 Fairchild Semiconductor Corporation
74ACTQ14 Rev. 1.5
www.fairchildsemi.com
3
74ACTQ14 Quiet Series™ Hex Inverter with Schmitt Trigger Input
AC Electrical Characteristics
T
A
=
+25°C,
C
L
=
50pF
Symbol
t
PLH
t
PHL
T
A
=
–40°C to +85°C,
C
L
=
50pF
Min.
3.0
3.0
Parameter
Propagation Delay,
Data to Output
Propagation Delay,
Data to Output
V
CC
(V)
(5)
5.0
5.0
5.0
Min.
3.0
3.0
Typ.
8.0
8.0
0.5
Max.
10.0
10.0
1.0
Max.
11.0
11.0
1.0
Units
ns
ns
ns
t
OSHL
, t
OSLH
Output to Output Skew
(6)
Notes:
5. Voltage range 5.0 is 5.0V ± 0.5V.
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Conditions
V
CC
=
OPEN
V
CC
=
5.0V
Typ.
4.5
80
Units
pF
pF
©1991 Fairchild Semiconductor Corporation
74ACTQ14 Rev. 1.5
www.fairchildsemi.com
4
74ACTQ14 Quiet Series™ Hex Inverter with Schmitt Trigger Input
FACT Noise Characteristics
The setup of a noise characteristics measurement is
critical to the accuracy and repeatability of the tests. The
following is a brief description of the setup used to
measure the noise characteristics of FACT.
V
OLP
/V
OLV
and V
OHP
/V
OHV
:
■
Determine the quiet output pin that demonstrates the
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50pF,
500Ω.
2. Deskew the HFS generator so that no two channels
have greater than 150ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper
loading of the outputs and that the input levels are at
the correct voltage.
4. Set the HFS generator to toggle all but one output at
a frequency of 1MHz. Greater frequencies will
increase DUT heating and effect the results of the
measurement.
greatest noise levels. The worst case pin will usually
be the furthest from the ground pin. Monitor the output
voltages using a 50Ω coaxial cable plugged into a
standard SMB type connector on the test fixture.
Do not use an active FET probe.
■
Measure V
OLP
and V
OLV
on the quiet output during
the worst case transition for active and enable.
Measure V
OHP
and V
OHV
on the quiet output during
the worst case active and enable transition.
■
Verify that the GND reference recorded on the
oscilloscope has not drifted to ensure the accuracy
and repeatability of the measurements.
V
ILD
and V
IHD
:
■
Monitor one of the switching outputs using a 50Ω
coaxial cable plugged into a standard SMB type
connector on the test fixture. Do not use an active
FET probe.
■
First increase the input LOW voltage level, V
IL
, until
the output begins to oscillate or steps out a min of 2ns.
Oscillation is defined as noise on the output LOW
level that exceeds V
IL
limits, or on output HIGH levels
that exceed V
IH
limits. The input LOW voltage level at
which oscillation occurs is defined as V
ILD
.
■
Next decrease the input HIGH voltage level, V
IH
, until
the output begins to oscillate or steps out a min of 2ns.
Oscillation is defined as noise on the output LOW
level that exceeds V
IL
limits, or on output HIGH levels
that exceed V
IH
limits. The input HIGH voltage level at
which oscillation occurs is defined as V
IHD
.
■
Verify that the GND reference recorded on the
oscilloscope has not drifted to ensure the accuracy
and repeatability of the measurements.
Notes:
7. V
OHV
and V
OLP
are measured with respect to ground
reference.
8. Input pulses have the following characteristics:
f
=
1MHz, t
r
=
3ns, t
f
=
3ns, skew
<
150ps.
Figure 1. Quiet Output Noise Voltage Waveforms
5. Set the HFS generator input levels at 0V LOW and
3V HIGH for ACT devices and 0V LOW and 5V HIGH
for AC devices. Verify levels with an oscilloscope.
Figure 2. Simultaneous Switching Test Circuit
©1991 Fairchild Semiconductor Corporation
74ACTQ14 Rev. 1.5
www.fairchildsemi.com
5
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