FAN25801 — 250 mA, Low-I
Q
, Low-Noise, LDO Regulator
May 2014
FAN25801
250 mA, Low-I
Q
, Low-Noise, LDO Regulator
Features
V
IN
: 2.3 V to 5.5 V
V
OUT
= 5.14 V (I
OUT
Max. = 250 mA)
Output Noise Density at 250 mA and
10 kHz = 20 nV/√Hz (Integrated 10 µVrms)
Low I
Q
of 17 µA in Regulation and Low-I
Q
Dropout
Mode with Optimized Dropout Transitions
<70 mV Dropout Voltage at 250 mA Load
Controlled Soft-Start to Reduce Inrush Current
Thermal Shutdown Protection (TSD)
Input Under-Voltage Lockout (UVLO)
Short-Circuit Protection (SCP)
Stable with Two 1.5 µF, 0201 Ceramic Capacitors
at VOUT
4-Ball WLCSP, 0.65 mm x 0.65 mm, 0.35 mm
Pitch, Plated Solder, 330 µm Maximum Thickness
EN
VIN
1.5µF
Description
The FAN25801 is a linear low-dropout regulator with a
high PSRR (80 dB typical at 100 Hz) and low output
noise (typically 10 µV
RMS
over a 10 Hz to 100 kHz
bandwidth). The LDO can provide up to 250 mA of
output current.
The enable control pin can be used to shut down the
device and disconnect the output load from the input.
During shutdown, the supply current drops below 1 µA.
The FAN25801 is designed to be stable with space-
saving ceramic capacitors as small as 0201 case size.
The FAN25801 is available in a 4-bump, 0.35 mm pitch,
WLCSP package.
FAN25801
VOUT
1.5µF 1.5µF
Applications
WiFi Modules
PDA Handsets
Smart Phones, Tablets, Portable Devices
Figure 1. Typical Application
GND
Ordering Information
Part Number
V
OUT
I
OUT
Max.
250 mA
Operating
Temperature
-40°C to 85°C
Package
4-Bump, WLCSP,
0.65 x 0.65 mm, 0.35 mm
Pitch
Packing
Method
Tape & Reel
FAN25801AUC514X 5.14 V
© 2014 Fairchild Semiconductor Corporation
FAN25801 • Rev. 1.0.2
www.fairchildsemi.com
FAN25801 — 250 mA, Low-I
Q
, Low-Noise, LDO Regulator
Block Diagram
VIN
Q1
VOUT
C
IN
C
OUT
V
REF
FILTER
EN
GND
Figure 2. IC and System Block Diagram
Table 1. Recommended External Components
Component
C
IN
C
OUT
C
Alternative
(2)
Description
1.5 µF, 6.3 V, X5R, 0201
2x1.5 µF, 6.3 V, X5R, 0201
1.0 µF, 6.3 V, X5R, 0201
Vendor
Murata GRM033R60J155M
Murata GRM033R60J155M
Murata GRM033R60J105M
Parameter Typ. Unit
1.5
(1)
C
1.5
1.0
(1)
(1)
µF
µF
µF
Notes:
1. Capacitance value does not reflect effects of bias, tolerance, and temperature.
See Recommended Operating
Conditions and Operation Description sections for more information.
2. C
Alternative
can be used for both C
IN
and C
OUT
. FAN25801 is stable with one 1 µF at C
IN
and one 1 µF at C
OUT
.
Pin Configuration
VIN
EN
A1
B1
A2
B2
VOUT
GND
VOUT
A2
GND
B2
A1
B1
VIN
EN
Figure 3. Top-Through View
Figure 4. Bottom View
Pin Definitions
Pin #
A1
A2
B1
B2
Name
VIN
VOUT
EN
GND
Description
Input Voltage.
Connect to input power source and C
IN
.
Output Voltage.
Connect to C
OUT
and load.
Enable.
The device is in Shutdown Mode when this pin is LOW. No internal pull-down.
Do not leave this pin floating. Recommended to not tie EN pin directly to VIN.
(3)
Ground.
Power and IC ground. All signals are referenced to this pin.
Note:
3. EN can be tied to VIN, but it is recommended to tie a 1.8 V logic voltage to drive it.
© 2014 Fairchild Semiconductor Corporation
FAN25801 • Rev. 1.0.2
www.fairchildsemi.com
2
FAN25801 — 250 mA, Low-I
Q
, Low-Noise, LDO Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
IN
V
CC
T
J
T
STG
T
L
ESD
LU
Parameter
Input Voltage with Respect to GND
Voltage on Any Other Pin (with Respect to GND)
Junction Temperature
Storage Temperature
Lead Soldering Temperature, 10 Seconds
Electrostatic Discharge
Protection Level
Latch Up
Human Body Model,
ANSI/ESDA/JEDEC JS-001-2012
Charged Device Model per JESD22-C101
Min.
-0.3
-0.3
-40
-65
Max.
6.0
V
IN
+0.3
+150
+150
+260
(4)
Unit
V
V
°C
°C
°C
V
4000
1500
JESD 78D
Note:
4. Lesser of 6.0 V or V
IN
+ 0.3 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
IN
I
OUT
C
IN
C
OUT
T
A
T
J
Supply Voltage
Parameter
Output Current (
V
OUT
= 5.14 V)
Input Capacitor (Effective Capacitance)
Ambient Temperature
Junction Temperature
(6)
(6)
Min.
2.3
0.4
0.4
–40
–40
Typ.
Max.
5.5
(5)
250
Unit
V
mA
µF
µF
°C
°C
0.8
0.8
15.0
+85
+125
Output Capacitor (Effective Capacitance)
Notes:
5. For V
IN
≥ 5V, thermal properties of the device must be taken into account at maximum load of 250 mA; refer to
JA
thermal properties.
6. Effective capacitance, including the effects of bias, tolerance, and temperature.
See the Operation Description
section for more information.
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with
four-layer 2s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed
junction temperature, T
J(max)
, at a given ambient temperature, T
A
.
Symbol
JA
JB
Parameter
Junction-to-Ambient Thermal Resistance
Junction-to-PCB Thermal Resistance
Typ.
180
50
Unit
°C/W
°C/W
© 2014 Fairchild Semiconductor Corporation
FAN25801 • Rev. 1.0.2
www.fairchildsemi.com
3
FAN25801 — 250 mA, Low-I
Q
, Low-Noise, LDO Regulator
Electrical Specifications
Minimum and maximum values are at V
IN
= V
OUT
+ 0.3 V; T
A
= -40°C to +85°C; and test circuit shown in Figure 1.
Typical values are at V
IN
= V
OUT
+ 0.3 V, T
A
= 25°C, I
LOAD
= 10 mA, and V
EN
= 1.8 V, unless otherwise noted.
Symbol
LDO
I
IN
Parameter
Conditions
5.4 V ≤ V
IN
≤ 5.5 V, I
LOAD
= 0 mA
Dropout
(8)
, I
LOAD
= 0 mA
f = 50 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
I
OUT
= 10 mA
I
OUT
= 250 mA
I
OUT
= 10 mA
I
OUT
= 250 mA
Min. Typ. Max.
17.0
18.5
80
80
80
76
16
20
7
10
70
-1.9
8
275
323
110
+1.9
35
400
25.0
30.0
Unit
V
IN
Supply Current
µA
PSRR
Power Supply Rejection Ratio
(7)
I
OUT
= 10 mA,
V
IN
= 3.6 V
dB
e
n
e
n_bw
V
DO
ΔV
OUT
Output Noise Voltage Density
(7)
Output Noise Voltage
(Integrated)
(7)
V
OUT
Dropout Voltage
(8)
V
OUT
Voltage Accuracy
f = 10 kHz
f = 10 Hz – 100 kHz
nV/√Hz
µV
RMS
mV
%
µV/mA
mA
µA
V
mV
500
µs
°C
V
OUT
= V
OUT_TARGET
– 100 mV,
I
OUT
= 250 mA
5 mA ≤ I
OUT
≤ 250 mA,
V
IN
= 5.4 V to 5.5 V
I
OUT
= 5 mA to 250 mA, V
OUT
= 5.14 V
I
OUT
= 0 mA → Current Limit,
V
OUT
Drops by 2%, V
OUT
= 5.14 V
V
EN
= 0 V, 2.9 V ≤ V
IN
≤ 4.8 V
Rising V
IN
ΔV
OUT_LOAD
Load Regulation
I
LIM
I
SD
V
UVLO
V
UVHYS
t
START
TSD
V
OUT
Current Limit
Shutdown Supply Current
Under-Voltage Lockout
Threshold
Under-Voltage Lockout
Hysteresis
Startup Time
Thermal Shutdown
0.125 1.000
2.1
150
2.3
Rising EN to 95% V
OUT
, I
OUT
= 10 mA
Rising Temperature
Hysteresis
250
150
20
Logic Levels: EN
V
IH
V
IL
I
EN
Enable High-Level Input Voltage
Enable Low-Level Input Voltage
Input Bias Current
V
EN
= 1.8 V
0.04
1.05
0.4
1.00
V
V
µA
Notes:
7. Guaranteed by design; not tested in production.
8. Dropout voltage = V
IN
- V
OUTx
when V
OUT
drops more than 100 mV below the nominal regulated V
OUT
level.
© 2014 Fairchild Semiconductor Corporation
FAN25801 • Rev. 1.0.2
www.fairchildsemi.com
4
FAN25801 — 250 mA, Low-I
Q
, Low-Noise, LDO Regulator
Typical Characteristics
Unless otherwise specified; V
IN
= V
OUT
+ 0.3 V, V
OUT
= 5.14 V, V
EN
= 1.8 V, and T
A
= +25°C.
5.155
5.200
5.190
5.153
5.180
5.170
-40C
+25C
VOUT (V)
VOUT (V)
5.151
5.160
5.150
5.140
5.130
5.120
5.110
+85C
5.149
VIN=5.40V
5.147
VIN=5.45V
VIN=5.50V
5.145
0
50
100
I Load (mA)
150
200
250
5.100
0
50
100
I Load (mA)
150
200
250
Figure 5. Output Regulation vs. Load Current and
Input Voltage
30.0
Figure 6 Output Regulation vs. Load Current
and Temperature
1.2
25.0
1.0
20.0
Shutdown Current (uA)
Quiescent Current (uA)
0.8
15.0
-40C
0.6
-40C
+25C
+25C
10.0
+85C
0.4
+85C
5.0
0.2
0.0
2.0
2.5
3.0
3.5
VIN (V)
4.0
4.5
5.0
5.5
0.0
2.0
2.5
3.0
3.5
VIN (V)
4.0
4.5
5.0
5.5
Figure 7. Quiescent Current vs. Input Voltage
and Temperature
Figure 8. Shutdown Current vs. Input Voltage
and Temperature
Figure 9. PSRR vs. Frequency, 10 mA Load
Figure 10. PSRR vs. Frequency, 250 mA Load
© 2014 Fairchild Semiconductor Corporation
FAN25801 • Rev. 1.0.2
www.fairchildsemi.com
5
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