CY62137FV18 MoBL
®
2-Mbit (128 K × 16) Static RAM
2-Mbit (128 K × 16) Static RAM
Features
■
■
■
■
Very high speed: 55 ns
Wide voltage range: 1.65 V to 2.25 V
Pin compatible with CY62137CV18
Ultra low standby power
❐
Typical standby current: 1
A
❐
Maximum standby current: 5
A
Ultra low active power
❐
Typical active current: 1.6 mA @ f = 1 MHz
Easy memory expansion with CE and OE features
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Byte power-down feature
Available in a Pb-free 48-ball Very fine-pitch ball grid package
(VFBGA) package
■
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input and output pins (I/O
0
through I/O
15
) are placed
in a high impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), both the Byte High
Enable and the Byte Low Enable are disabled (BHE, BLE HIGH),
or during an active write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O
0
through I/O
7
) is written into the location
specified on the address pins (A
0
through A
16
). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O
8
through
I/O
15
) is written into the location specified on the address pins
(A
0
through A
16
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O
0
to I/O
7
. If
Byte High Enable (BHE) is LOW, then data from the memory
appears on I/O
8
to I/O
15
. See the
Truth Table on page 11
for a
complete description of read and write modes.
For a complete list of related documentation,
click here.
■
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■
■
Functional Description
The CY62137FV18 is a high performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
) in portable
Logic Block Diagram
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DATA IN DRIVERS
ROW DECODER
128K x 16
RAM Array
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
BHE
BLE
A
14
POWER DOWN
CIRCUIT
CE
A
11
A
12
A
13
A
15
A
16
Cypress Semiconductor Corporation
Document Number: 001-08030 Rev. *L
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised November 19, 2014
CY62137FV18 MoBL
®
Contents
Product Portfolio .............................................................. 3
Pin Configuration ............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 11
Ordering Information ...................................................... 12
Ordering Code Definitions ......................................... 12
Package Diagram ............................................................ 13
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC® Solutions ...................................................... 16
Cypress Developer Community ................................. 16
Technical Support ..................................................... 16
Document Number: 001-08030 Rev. *L
Page 2 of 16
CY62137FV18 MoBL
®
Product Portfolio
Power Dissipation
Product
Min
CY62137FV18LL
1.65
V
CC
Range (V)
Typ
[1]
1.8
Max
2.25
55
Speed
(ns)
Operating I
CC
(mA)
f = 1 MHz
Typ
[1]
1.6
Max
2.5
f = f
max
Typ
[1]
13
Max
18
Standby I
SB2
(A)
Typ
[1]
1
Max
5
Pin Configuration
Figure 1. 48-ball VFBGA pinout
[2, 3]
Top View
1
BLE
I/O
8
I/O
9
2
OE
BHE
I/O
10
3
A
0
A
3
A
5
NC
NC
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
NC
I/O
0
I/O
2
V
CC
V
SS
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
V
SS
I/O
11
V
CC
I/O
12
I/O
14
I/O
13
A
14
I/O
15
NC
NC
A
8
A
12
A
9
Notes
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
2. NC pins are not connected on the die.
3. Pins D3, H1, G2, H6 and H3 in the VFBGA package are address expansion pins for 4 Mb, 8 Mb, 16 Mb, and 32 Mb and 64 Mb respectively.
Document Number: 001-08030 Rev. *L
Page 3 of 16
CY62137FV18 MoBL
®
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature with
power applied ......................................... –55 °C to + 125 °C
Supply voltage to ground
potential ....................................................–0.2 V to + 2.45 V
DC voltage applied to outputs
in High Z State
[4, 5]
......................................–0.2 V to 2.45 V
DC Input Voltage
[4, 5]
..................................–0.2 V to 2.45 V
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage
(MIL-STD-883, Method 3015) ................................ > 2001 V
Latch up Current .................................................... > 200 mA
Operating Range
Device
CY62137FV18
Range
Ambient
Temperature
V
CC
[6]
Industrial –40 °C to +85 °C 1.65 V to 2.25 V
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input leakage current
Output leakage current
V
CC
operating supply current
I
OH
= –0.1 mA
I
OL
= 0.1 mA
V
CC
= 1.65 V to 2.25 V
V
CC
= 1.65 V to 2.25 V
GND < V
I
< V
CC
GND < V
O
< V
CC
, output disabled
f = f
max
= 1/t
RC
V
CC(max)
= 2.25 V
I
OUT
= 0 mA
CMOS levels
V
CC(max)
= 2.25 V
Test Conditions
55 ns
Min
1.4
–
1.4
–0.2
–1
–1
–
Typ
[7]
–
–
–
–
–
–
13
Max
–
0.2
V
CC
+ 0.2
0.4
+1
+1
18
Unit
V
V
V
V
A
A
mA
f = 1 MHz
I
SB1[8]
–
–
1.6
1
2.5
5
mA
A
I
SB2 [8]
Automatic power-down current – CE > V
CC
0.2
V, or
V
CC(max)
= 2.25 V
CMOS inputs
(BHE and BLE) > V
CC
0.2
V,
V
IN
> V
CC
– 0.2 V, V
IN
< 0.2 V,
f = f
max
(address and data
only), f = 0 (OE, WE)
Automatic power-down current – CE > V – 0.2 V, or
V
CC(max)
= 2.25 V
CC
CMOS inputs
(BHE and BLE) > V
CC
0.2
V,
V
IN
> V
CC
– 0.2 V, or
V
IN
< 0.2 V, f = 0
–
1
5
A
Notes
4. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
5. V
IH(max)
=V
CC
+ 0.5 V for pulse durations less than 20 ns.
6. Full device AC operation assumes a minimum of 100
s
ramp time from 0 to V
CC
(min) and 200
s
wait time after V
CC
stabilization.
7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C
8. Chip enable (CE) and byte enables (BHE and BLE) must be tied to CMOS levels to meet the I
SB1
/ I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
Document Number: 001-08030 Rev. *L
Page 4 of 16
CY62137FV18 MoBL
®
Capacitance
Parameter
[9]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
[9]
JA
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Still air, soldered on a 3 × 4.5 inch, two-layer printed circuit
board
48-ball VFBGA Unit
75
10
C/W
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms
V
CC
OUTPUT
R1
V
CC
30 pF
INCLUDING
JIG AND
SCOPE
R2
10%
GND
Rise Time = 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Equivalent to: THÉVENIN EQUIVALENT
R
TH
OUTPUT
V
Parameters
R1
R2
R
TH
V
TH
1.80 V
13500
10800
6000
0.80
Unit
V
Note
9. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 001-08030 Rev. *L
Page 5 of 16
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