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74AC399PC

产品描述Encoders, Decoders, Multiplexers u0026 Demultiplexers Qd 2-Port Register
产品类别逻辑    逻辑   
文件大小99KB,共9页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
标准
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74AC399PC概述

Encoders, Decoders, Multiplexers u0026 Demultiplexers Qd 2-Port Register

74AC399PC规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Fairchild
零件包装代码DIP
包装说明0.300 INCH, PLASTIC, MS-001, DIP-16
针数16
Reach Compliance Codecompliant
其他特性FOUR 2:1 MUX FOLLOWED BY REGISTER
系列AC
JESD-30 代码R-PDIP-T16
JESD-609代码e3
长度19.305 mm
负载电容(CL)50 pF
逻辑集成电路类型D FLIP-FLOP
最大频率@ Nom-Sup130000000 Hz
最大I(ol)0.012 A
位数4
功能数量1
端子数量16
最高工作温度85 °C
最低工作温度-40 °C
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装等效代码DIP16,.3
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)NOT APPLICABLE
电源3.3/5 V
传播延迟(tpd)11 ns
认证状态Not Qualified
座面最大高度5.08 mm
最大供电电压 (Vsup)6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)3.3 V
表面贴装NO
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT APPLICABLE
触发器类型POSITIVE EDGE
宽度7.62 mm
最小 fmax165 MHz
Base Number Matches1

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74AC399 • 74ACT399 Quad 2-Port Register
June 1988
Revised October 2000
74AC399 • 74ACT399
Quad 2-Port Register
General Description
The AC/ACT399 is the logical equivalent of a quad 2-input
multiplexer feeding into four edge-triggered flip-flops. A
common Select input determines which of the two 4-bit
words is accepted. The selected data enters the flip-flop on
the rising edge of the clock.
Features
s
I
CC
reduced by 50%
s
Select inputs from two data sources
s
Fully positive edge-triggered operation
s
Outputs source/sink 24 mA
s
AC/ACT399 has TTL-compatible inputs
Ordering Code:
Order Number
74AC399SC
74AC399PC
74ACT399SC
74ACT399SJ
74ACT399MTC
74ACT399PC
Package Number
M16A
N16E
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
S
CP
I
0a
–I
0d
I
1a
–I
1d
Q
a
–Q
d
Description
Common Select Input
Clock Pulse Input
Data Inputs from Source 0
Data Inputs from Source 1
Register True Outputs
FACT is a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS009789
www.fairchildsemi.com

 
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