b. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 72276
S09-0270-Rev. C, 16-Feb-09
www.vishay.com
1
Si7491DP
Vishay Siliconix
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State Resistance
a
Forward Transconductance
a
Diode Forward Voltage
a
Dynamic
b
Symbol
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
V
SD
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
t
rr
Test Conditions
V
DS
= V
GS
, I
D
= - 250 µA
V
DS
= 0 V, V
GS
= ± 20 V
V
DS
= - 30 V, V
GS
= 0 V
V
DS
= - 30 V, V
GS
= 0 V, T
J
= 70 °C
V
DS
= - 5 V, V
GS
= - 10 V
V
GS
= - 10 V, I
D
= - 18 A
V
GS
= - 4.5 V, I
D
= - 14 A
V
DS
= - 15 V, I
D
= - 18 A
I
S
= - 4.5 A, V
GS
= 0 V
Min.
- 1.0
Typ.
Max.
- 3.0
± 100
-1
- 10
Unit
V
nA
µA
A
- 30
0.007
0.0105
46
- 0.74
56
- 1.1
85
0.0085
0.013
Ω
S
V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Resistance
Source-Drain Reverse Recovery Time
V
DS
= - 15 V, V
GS
= - 5 V, I
D
= - 18 A
12
25
150
225
290
180
140
80
nC
V
DD
= - 15 V, R
L
= 15
Ω
I
D
≅
- 1 A, V
GEN
= - 4.5 V, R
g
= 6
Ω
190
120
90
2.5
ns
I
F
= - 2.9 A, dI/dt = 100 A/µs
50
Notes
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
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