MC74LVXT4051
Analog Multiplexer/
Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74LVXT4051 utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low leakage
currents. This analog multiplexer/demultiplexer controls analog
voltages that may vary across the complete power supply range (from
V
CC
to V
EE
).
The LVXT4051 is similar in pinout to the LVX8051, the HC4051A,
and the metal−gate MC14051B. The Channel−Select inputs determine
which one of the Analog Inputs/Outputs is to be connected, by means
of an analog switch, to the Common Output/Input. When the Enable
pin is HIGH, all analog switches are turned off.
The Channel−Select and Enable inputs are compatible with standard
TTL levels. These inputs are over−voltage tolerant (OVT) for level
translation from 6.0 V down to 3.0 V.
This device has been designed so the ON resistance (R
ON
) is more
linear over input voltage than the R
ON
of metal−gate CMOS analog
switches and High−Speed CMOS analog switches.
Features
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MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
16
TSSOP−16
DT SUFFIX
CASE 948F
1
16
SOEIAJ−16
M SUFFIX
CASE 966
1
LVXT4051
A
WL, L
Y
WW, W
G or
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
LVXT4051
ALYWG
LVXT
4051
ALYWG
G
LVXT4051G
AWLYWW
•
•
•
•
•
•
Select Pins Compatible with TTL Levels
Fast Switching and Propagation Speeds
Low Crosstalk Between Switches
Analog Power Supply Range (V
CC
−
V
EE
) =
*3.0
V to
)3.0
V
Digital (Control) Power Supply Range (V
CC
−
GND) = 2.5 to 6.0 V
Improved Linearity and Lower ON Resistance Than Metal−Gate,
HSL, or VHC Counterparts
•
Low Noise
Split Supplies up to
±3.0
V
•
Break−Before−Make Circuitry
•
These Devices are Pb−Free and are RoHS Compliant
•
Designed to Operate on a Single Supply with V
EE
= GND, or Using
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
May, 2011
−
Rev. 5
1
Publication Order Number:
MC74LVXT4051/D
MC74LVXT4051
FUNCTION TABLE
V
CC
16
X2
15
X1
14
X0
13
X3
12
A
11
B
10
C
9
Control Inputs
Enable
L
L
L
L
L
L
L
L
H
X = Don’t Care
C
L
L
L
L
H
H
H
H
X
Select
B
A
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
X
ON Channels
X0
X1
X2
X3
X4
X5
X6
X7
NONE
1
X4
2
X6
3
X
4
X7
5
6
7
8
X5 Enable V
EE
GND
Figure 1. Pin Connection and Marking Diagram
(Top View)
X0
X1
X2
ANALOG
INPUTS/OUTPUTS
13
14
15
3
MULTIPLEXER/
DEMULTIPLEXER
X
COMMON
OUTPUT/INPUT
X3 12
1
X4
5
X5
X6 2
X7
4
A 11
CHANNEL
10
B
SELECT INPUTS
9
C
6
ENABLE
PIN 16 = V
CC
PIN 8 = GND
PIN 7 = V
EE
Figure 2. Logic Diagram
Single−Pole, 8−Position Plus Common Off
ORDERING INFORMATION
Device
MC74LVXT4051DG
MC74LVXT4051DR2G
MC74LVXT4051DTG
MC74LVXT4051DTR2G
MC74LVXT4051MG
MC74LVXT4051MELG
Package
SOIC−16
(Pb−Free)
SOIC−16
(Pb−Free)
TSSOP−16*
TSSOP−16*
SOEIAJ−16
(Pb−Free)
SOEIAJ−16
(Pb−Free)
Shipping
†
48 Units / Rail
2500 Tape & Reel
96 Units / Rail
2500 Tape & Reel
50 Units / Rail
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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2
MC74LVXT4051
NORMALIZED FAILURE RATE
T
J
= 130_C
T
J
= 120_C
T
J
= 100_C
T
J
= 110_C
T
J
= 90_C
80
90
100
110
120
130
140
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
117.8
47.9
20.4
9.4
4.2
2.0
1.0
1
1
10
TIME, YEARS
100
1000
Figure 3. Failure Rate vs. Time Junction Temperature
http://onsemi.com
3
T
J
= 80_C
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MAXIMUM RATINGS
Symbol
V
EE
Parameter
Value
Unit
V
V
V
V
Negative DC Supply Voltage
Positive DC Supply Voltage
Analog Input Voltage
Digital Input Voltage
(Referenced to GND)
V
CC
V
IS
I
(Referenced to GND)
(Referenced to V
EE
)
*
7.0 to
)0.5
*
0.5 to
)7.0
*
0.5 to
)7.0
*
0.5 to 7.0
$20
260
143
164
500
450
V
EE
*
0.5 to V
CC
)0.5
V
IN
(Referenced to GND)
DC Current, Into or Out of Any Pin
Storage Temperature Range
mA
_C
_C
_C
T
STG
T
L
T
J
*
65 to
)150
)150
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
q
JA
P
D
SOIC
TSSOP
SOIC
TSSOP
°C/W
mW
Power Dissipation in Still Air,
Moisture Sensitivity
MSL
F
R
Level 1
Flammability Rating
Oxygen Index: 30%
−
35%
UL 94−V0 @ 0.125 in
u2000
u200
u1000
$300
V
ESD
ESD Withstand Voltage
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
V
I
LATCHUP
Latchup Performance
Above V
CC
and Below GND at 125°C (Note 4)
mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
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V
EE
Negative DC Supply Voltage
Positive DC Supply Voltage
Analog Input Voltage
Digital Input Voltage
(Referenced to GND)
Symbol
V
CC
V
IS
T
A
Parameter
Min
2.5
2.5
0
0
0
Max
6.0
6.0
6.0
Unit
V
V
V
V
*
6.0
GND
(Referenced to GND)
(Referenced to V
EE
)
V
EE
V
CC
125
100
20
V
IN
(Note 5) (Referenced to GND)
Operating Temperature Range, All Package Types
*
55
_C
t
r
, t
f
Input Rise/Fall Time
(Channel Select or Enable Inputs)
V
CC
= 3.0 V
$
0.3 V
V
CC
= 5.0 V
$
0.5 V
ns/V
5. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature
°C
Time, Hours
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Time, Years
MC74LVXT4051
DC CHARACTERISTICS
−
Digital Section
(Voltages Referenced to GND)
Symbol
V
IH
Parameter
Minimum High−Level Input
Voltage,
Channel−Select or Enable Inputs
Maximum Low−Level Input
Voltage,
Channel−Select or Enable Inputs
Maximum Input Leakage Current,
Channel−Select or Enable Inputs
Maximum Quiescent Supply
Current (per Package)
V
IN
= 6.0 or GND
Channel Select, Enable and
V
IS
= V
CC
or GND
Condition
V
CC
V
3.0
4.5
5.5
3.0
4.5
5.5
0 V to 6.0 V
6.0
Guaranteed Limit
*55
to 25°C
2.0
2.0
2.0
0.5
0.8
0.8
$0.1
4.0
v85°C
2.0
2.0
2.0
0.5
0.8
0.8
$1.0
40
v125°C
2.0
2.0
2.0
0.5
0.8
0.8
$1.0
80
Unit
V
V
IL
V
I
IN
I
CC
mA
mA
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Î
Î
Symbol
R
ON
Parameter
Test Conditions
V
CC
V
3.0
4.5
3.0
3.0
4.5
3.0
V
EE
V
Guaranteed Limit
v85_C
108
46
33
20
18
15
*55
to 25°C
86
37
26
15
13
10
v125_C
120
55
37
20
18
15
Unit
W
Maximum “ON” Resistance
V
IN
= V
IL
or V
IH
V
IS
=
½
(V
CC
−
V
EE
)
|I
S
| = 2.0 mA (Figure 4)
V
IN
= V
IL
or V
IH
V
IS
=
½
(V
CC
−
V
EE
)
|I
S
| = 2.0 mA
0
0
*
3.0
0
0
*
3.0
0
−3.0
0
−3.0
0
−3.0
DR
ON
Maximum Difference in “ON” Res-
istance Between Any Two
Channels in the Same Package
W
I
off
Maximum Off−Channel Leakage
Current, Any One Channel
V
in
= V
IL
or V
IH
;
V
IO
= V
CC
or GND;
Switch Off (Figure 3)
V
in
= V
IL
or V
IH
;
V
IO
= V
CC
or GND;
Switch Off (Figure 4)
5.5
+3.0
5.5
+3.0
5.5
+3.0
0.1
0.1
0.2
0.2
0.2
0.2
0.5
0.5
2.0
2.0
2.0
2.0
1.0
1.0
4.0
4.0
4.0
4.0
mA
Maximum Off−Channel
Leakage Current,
Common Channel
I
on
Maximum On−Channel
Leakage Current,
Channel−to−Channel
V
in
= V
IL
or V
IH
;
Switch−to−Switch =
V
CC
or GND; (Figure 5)
mA
DC ELECTRICAL CHARACTERISTICS
−
Analog Section
AC CHARACTERISTICS
(Input t
r
= t
f
= 3 ns)
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Î
Î
Î
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ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
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Î
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Î
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Î Î Î
Î
Î
Guaranteed Limit
Symbol
t
BBM
Parameter
Test Conditions
V
CC
V
3.0
4.5
3.0
V
EE
V
*55
to 25_C
Min
1.0
1.0
1.0
Typ*
6.5
5.0
3.5
v85_C
−
−
−
v125_C
−
−
−
Unit
ns
Minimum Break−Before−Make
Time
V
IN
= V
IL
or V
IH
V
IS
= V
CC
R
L
= 300
W,
C
L
= 35 pF
(Figures 12 and 13)
0.0
0.0
*
3.0
*Typical Characteristics are at 25_C.
http://onsemi.com
4
MC74LVXT4051
AC CHARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 3 ns)
Guaranteed Limit
V
CC
V
2.5
3.0
4.5
3.0
2.5
3.0
4.5
3.0
2.5
3.0
4.5
3.0
V
EE
V
0
0
0
*
3.0
0
0
0
*
3.0
0
0
0
*
3.0
*
55 to 25°C
Min
Typ
Max
40
28
23
23
40
28
23
23
40
28
23
23
v85°C
Min
Max
45
30
25
25
45
30
25
25
45
30
25
25
v125°C
Min
Max
50
35
30
28
50
35
30
28
50
35
30
28
Unit
ns
Symbol
t
PLH
,
t
PHL
Parameter
Maximum Propagation Delay, Channel−Select
to Analog Output (Figures 16 and 17)
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Enable to Analog
Output (Figures 14 and 15)
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Enable to Analog
Output (Figures 14 and 15)
ns
Typical @ 25°C, V
CC
= 5.0 V, V
EE
= 0V
C
PD
C
IN
C
I/O
Power Dissipation Capacitance (Figure 18) (Note 6)
Maximum Input Capacitance, Channel−Select or Enable Inputs
Maximum Capacitance
(All Switches Off)
Analog I/O
Common O/I
Feedthrough
45
10
10
10
1.0
pF
pF
pF
6. Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC 2
f + I
CC
V
CC
.
ADDITIONAL APPLICATION CHARACTERISTICS
(GND = 0 V)
Symbol
BW
Parameter
Maximum On−Channel Bandwidth or
Minimum Frequency Response
Condition
V
IS
=
½
(V
CC
−
V
EE
)
Ref and Test Attn = 10 dB
Source Amplitude = 0 dB
(Figure 7)
f = 1 MHz; V
IS
=
½
(V
CC
−
V
EE
)
Adjust Network Analyzer output to 10 dBm
on each output from the power splitter.
(Figures 8 and 9)
V
IS
=
½
(V
CC
−
V
EE
)
Adjust Network Analyzer output to 10 dBm on
each output from the power splitter.
(Figure 11)
V
IN
= V
CC
to V
EE,
f
IS
= 1 kHz, t
r
= t
f
= 3 ns
R
IS
= 0
W,
C
L
= 1000 pF, Q = C
L
*
DV
OUT
(Figure 10)
f
IS
= 1 MHz, R
L
= 10 KW, C
L
= 50 pF,
V
IS
= 5.0 V
PP
sine wave
V
IS
= 6.0 V
PP
sine wave
(Figure 19)
V
CC
V
3.0
4.5
6.0
3.0
3.0
4.5
6.0
3.0
3.0
4.5
6.0
3.0
5.0
3.0
V
EE
V
0.0
0.0
0.0
*
3.0
0.0
0.0
0.0
*
3.0
0.0
0.0
0.0
*
3.0
Typ
25°C
80
80
80
80
Unit
MHz
V
ISO
Off−Channel Feedthrough Isolation
*
70
*
70
*
70
*
70
*
2
*
2
*
2
*
2
9.0
12
dB
V
ONL
Maximum Feedthrough On Loss
dB
Q
Charge Injection
*
3.0
0.0
*
3.0
0.0
pC
THD
Total Harmonic Distortion THD + Noise
%
6.0
3.0
0.10
0.05
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