74LVX132
LOW VOLTAGE CMOS QUAD 2-INPUT SCHMITT NAND GATE
WITH 5V TOLERANT INPUTS
s
s
s
s
s
s
s
s
s
s
s
HIGH SPEED :
t
PD
= 5.9ns (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
LOW POWER DISSIPATION:
I
CC
= 2
µA
(MAX.) at T
A
=25°C
TYPICAL HYSTERESIS : 0.7V at V
CC
= 3.3V
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 132
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LVX132M
T&R
74LVX132MTR
74LVX132TTR
DESCRIPTION
The 74LVX132 is a low voltage CMOS QUAD
2-INPUT SCHMITT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications. Power down protection is provided
on all inputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
Pin configuration and function are the same as
those of the 74LVX00 but the 74LVX132 has
hysteresis.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
July 2001
1/8
74LVX132
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
Supply Voltage (note 1)
Input Voltage
Output Voltage
Operating Temperature
Parameter
Value
2 to 3.6
0 to 5.5
0 to V
CC
-55 to 125
Unit
V
V
V
°C
1) Truth Table guaranteed: 1.2V to 3.6V
2/8
74LVX132
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
3.0
3.0
3.0
2.0
3.0
3.0
V
OL
Low Level Output
Voltage
2.0
3.0
3.0
I
I
I
CC
Input Leakage
Current
Quiescent Supply
Current
3.6
3.6
I
O
=-50
µA
I
O
=-50
µA
I
O
=-4 mA
I
O
=50
µA
I
O
=50
µA
I
O
=4 mA
V
I
= 5V or GND
V
I
= V
CC
or GND
0.9
0.3
1.9
2.9
2.58
0.0
0.0
0.1
0.1
0.36
±
0.1
2
2.0
3.0
1.2
0.3
1.9
2.9
2.48
0.1
0.1
0.44
±
1
20
T
A
= 25°C
Min.
Typ.
Max.
2.2
Value
-40 to 85°C
Min.
Max.
2.2
0.9
1.2
0.3
1.9
2.9
2.4
0.1
0.1
0.55
±
1
20
µA
µA
V
V
-55 to 125°C
Min.
Max.
2.2
0.9
1.2
V
V
V
Unit
V
t+
V
t-
V
H
V
OH
High Level Input
Threshold
Low Level Input
Threshold
Hysteresis Voltage
High Level Output
Voltage
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
C
L
= 50 pF
3.3
0.9
T
A
= 25°C
Min.
Typ.
0.3
-0.5
2.2
V
-0.3
Max.
0.5
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
Unit
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input (note
1, 3)
Dynamic Low
Voltage Input (note
1, 3)
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
3/8
74LVX132
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
2.7
2.7
3.3
(*)
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
3.3
(*)
2.7
3.3
(*)
C
L
(pF)
15
50
15
50
50
50
T
A
= 25°C
Min.
Typ.
7.5
8.3
5.9
6.5
0.5
0.5
Max.
10.5
12.0
8.0
9.0
1.0
1.0
Value
-40 to 85°C
Min.
1.0
1.0
1.0
1.0
Max.
12.0
13.5
9.0
10.0
1.5
1.5
-55 to 125°C
Min.
1.0
1.0
1.0
1.0
Max.
12.0
13.5
9.0
10.0
1.5
1.5
ns
ns
Unit
t
PLH
t
PHL
Propagation Delay
Time
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
±
0.3V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
T
A
= 25°C
Min.
Typ.
6
16
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
Unit
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per gate)
4/8
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