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74LVX245SJX

产品描述Bus Transceivers Octal Bidir Trans
产品类别逻辑    逻辑   
文件大小86KB,共6页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
标准
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74LVX245SJX概述

Bus Transceivers Octal Bidir Trans

74LVX245SJX规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Fairchild
零件包装代码SOIC
包装说明SOP, SOP20,.3
针数20
Reach Compliance Codecompliant
其他特性WITH DIRECTION CONTROL
控制类型COMMON CONTROL
计数方向BIDIRECTIONAL
系列LV/LV-A/LVX/H
JESD-30 代码R-PDSO-G20
JESD-609代码e3
长度12.6 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS TRANSCEIVER
最大I(ol)0.004 A
湿度敏感等级1
位数8
功能数量1
端口数量2
端子数量20
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP20,.3
封装形状RECTANGULAR
封装形式SMALL OUTLINE
包装方法TAPE AND REEL
峰值回流温度(摄氏度)260
电源3.3 V
Prop。Delay @ Nom-Sup11.5 ns
传播延迟(tpd)17 ns
认证状态Not Qualified
座面最大高度2.1 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)2.7 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
翻译N/A
宽度5.3 mm
Base Number Matches1

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74LVX245 Low Voltage Octal Bidirectional Transceiver
April 1993
Revised April 2005
74LVX245
Low Voltage Octal Bidirectional Transceiver
General Description
The LVX245 contains eight non-inverting bidirectional buff-
ers and is intended for bus-oriented applications. The
Transmit/Receive (T/R) input determines the direction of
data flow through the bidirectional transceiver. Transmit
(active-HIGH) enables data from A ports to B ports;
Receive (active-LOW) enables data from B ports to A
ports. The Output Enable input, when HIGH, disables both
A and B ports by placing them in a high impedance condi-
tion.
Features
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code
Order Number
74LVX245M
74LVX245SJ
74LVX245MTC
Package Number
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbols
Connection Diagram
Pin Descriptions
Pin
Names
OE
T/R
A
0
–A
7
B
0
–B
7
Description
Truth Table
Inputs
Outputs
OE
T/R
L
H
X
Bus B Data to Bus A
Bus A Data to Bus B
HIGH-Z State
X
Immaterial
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
L
L
H
H HIGH Voltage Level
L LOW Voltage Level
© 2005 Fairchild Semiconductor Corporation
DS011597
www.fairchildsemi.com

 
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