Important notice
Dear Customer,
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- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
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© Nexperia B.V. (year). All rights reserved.
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74AHC3G04-Q100;
74AHCT3G04-Q100
Inverter
Rev. 1 — 26 March 2013
Product data sheet
1. General description
The 74AHC3G04-Q100; 74AHCT3G04-Q100 are high-speed Si-gate CMOS devices.
They provide three inverting buffers
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Symmetrical output impedance
High noise immunity
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Low power dissipation
Balanced propagation delays
Multiple package options
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AHC3G04DP-Q100
74AHCT3G04DP-Q100
74AHC3G04DC-Q100
74AHCT3G04DC-Q100
40 C
to +125
C
VSSOP8
40 C
to +125
C
TSSOP8
Description
Version
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8
leads; body width 2.3 mm
SOT765-1
Type number
NXP Semiconductors
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
4. Marking
Table 2.
Marking codes
Marking code
[1]
A04
C04
A04
C04
Type number
74AHC3G04DP-Q100
74AHCT3G04DP-Q100
74AHC3G04DC-Q100
74AHCT3G04DC-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
1
7
1
1A
1Y
7
3
1
5
3
2A
2Y
5
1
6
3A
3Y
2
6
2
A
Y
mna110
mna720
mna721
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
6. Pinning information
6.1 Pinning
$+&*4
$+&7*4
$
<
$
*1'
DDD
9
&&
<
$
<
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 26 March 2013
2 of 13
NXP Semiconductors
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
6.2 Pin description
Table 3.
Symbol
1A, 2A, 3A
GND
1Y, 2Y, 3Y
V
CC
Pin description
Pin
1, 3, 6
4
7, 5, 2
8
Description
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Input nA
L
H
[1]
H = HIGH voltage level; L = LOW voltage level
Function table
[1]
Output nY
H
L
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+7.0
+7.0
-
20
25
75
-
+150
250
Unit
V
V
mA
mA
mA
mA
mA
C
mW
V
I
<
0.5
V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
20
-
-
-
75
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 26 March 2013
3 of 13
NXP Semiconductors
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 3.3 V
0.3 V
V
CC
= 5.0 V
0.5 V
Conditions
74AHC3G04-Q100
Min
2.0
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
74AHCT3G04-Q100
Min
4.5
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
-
20
V
V
V
C
ns/V
ns/V
Unit
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74AHC3G04-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OH
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
50 A;
V
CC
= 2.0 V
I
O
=
50 A;
V
CC
= 3.0 V
I
O
=
50 A;
V
CC
= 4.5 V
I
O
=
4.0
mA; V
CC
= 3.0 V
I
O
=
8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
A;
V
CC
= 2.0 V
I
O
= 50
A;
V
CC
= 3.0 V
I
O
= 50
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2.0
3.0
4.5
-
-
0
0
0
-
-
-
-
1.5
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.1
1.0
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
10
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
10
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
pF
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 26 March 2013
4 of 13
stm32/stm8
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