INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT640
Octal bus transceiver; 3-state;
inverting
Product specification
File under Integrated Circuits, IC06
March 1988
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; inverting
FEATURES
•
Octal bidirectional bus interface
•
Inverting 3-state outputs
•
Output capability: bus driver
•
I
CC
category: MSI
GENERAL DESCRIPTION
74HC/HCT640
The 74HC/HCT640 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT640 are octal transceivers featuring
inverting 3-state bus compatible outputs in both send and
receive directions.
The “640” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated. The “640” is similar to the “245” but has inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/
tPLH
PARAMETER
propagation delay
A
n
to B
n
;
B
n
to A
n
input capacitance
input/output capacitance
power dissipation capacitance
per transceiver
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
9
HCT
9
ns
UNIT
C
I
C
I/O
C
PD
Notes
3.5
10
35
3.5
10
35
pF
pF
pF
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
March 1988
2
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; inverting
PIN DESCRIPTION
PIN NO.
1
2, 3, 4, 5, 6, 7, 8, 9
10
19
20
SYMBOL NAME AND FUNCTION
DIR
A
0
to A
7
GND
OE
V
CC
direction control
data inputs/outputs
ground (0 V)
data inputs/outputs
output enable input (active LOW)
positive supply voltage
74HC/HCT640
18, 17, 16, 15, 14, 13, 12, 11 B
0
to B
7
Fig.1 Pin configuration.
Fig.2 Logic symbol.
FUNCTION TABLE
inputs
OE
L
L
H
Note
1. H
L
X
Z
= HIGH voltage level
= LOW voltage level
= don’t care
= high impedance OFF-state
DIR
L
H
X
inputs/outputs
A
n
A=B
inputs
Z
B
n
inputs
B=A
Z
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
March 1988
3
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; inverting
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL
PARAMETER
+25
−40
to +85
−40
to +125
max.
135
27
23
225
45
38
225
45
38
90
18
15
ns
74HC/HCT640
TEST CONDITIONS
UNIT V
CC
WAVEFORMS
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.5
min. typ. max. min. max. min.
t
PHL
/ t
PLH
propagation delay
A
n
to B
n
;
B
n
to A
n
3-state output enable time
OE, DIR to A
n
;
OE, DIR to B
n
3-state output disable time
OE, DIR to A
n
;
OE, DIR to B
n
output transition time
30
11
9
44
16
13
50
18
14
14
5
4
90
18
15
150
30
26
150
30
26
60
12
10
115
23
20
190
38
33
190
38
33
75
15
13
t
PZH
/ t
PZL
ns
Fig.6
t
PHZ
/ t
PLZ
ns
Fig.6
t
THL
/ t
TLH
ns
Fig.5
March 1988
4
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; inverting
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I
CC
category: MSI
Note to HCT types
74HC/HCT640
The value of additional quiescent supply current (∆I
CC
) for a unit load of 1 is given in the family specifications.
To determine
∆I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
A
n
B
n
OE
DIR
UNIT LOAD COEFFICIENT
1.50
1.50
1.50
0.90
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HCT
SYMBOL
PARAMETER
+25
−40
to +85
−40
to +125
max.
33
ns
4.5
Fig.5
UNIT V
CC
WAVEFORMS
(V)
TEST CONDITIONS
min. typ. max. min. max. min.
t
PHL
/ t
PLH
propagation delay
A
n
to B
n
;
B
n
to A
n
3-state output enable time
OE, DIR to A
n
;
OE, DIR to B
n
3-state output disable time
OE, DIR to A
n
;
OE, DIR to B
n
output transition time
11
22
28
t
PZH
/ t
PZL
18
30
38
45
ns
4.5
Fig.6
t
PHZ
/ t
PLZ
19
30
38
45
ns
4.5
Fig.6
t
THL
/ t
TLH
5
12
15
18
ns
4.5
Fig.5
March 1988
5
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
