MIC37300/01/02/03
3.0A, Low-Voltage µCap LDO Regulator
General Description
The Micrel MIC37300/01/02/03 is a 3.0A low-dropout
linear voltage regulator that provides a low voltage, high
current output with a minimum number of external
components. It offers high precision, ultra-low dropout
(500mV over temperature), and low ground current.
The MIC37300/01/02/03 operates from an input of 2.25V
to 6.0V. It is designed to drive digital circuits requiring low-
voltage at high currents (i.e., PLDs, DSP, microcontroller,
etc.). It is available in fixed and adjustable output voltages.
Fixed voltages include 1.5V, 1.8V, 2.5V, and 3.3V. The
adjustable version is capable of 1.24V to 5.5V.
Features of the MIC37300/01/02/03 LDO include thermal
and current-limit protection, and reverse-current protection.
Logic enable and error flag pins are available on the 5-pin
version.
Junction temperature range of the MIC37300/01/02/03 is
from –40°C to +125°C.
For applications requiring input voltage greater than 6.0V,
see the MIC3910x, MIC3915x, MIC3930x, and MIC3950x
LDOs.
Datasheets and support documentation are available on
Micrel’s website at:
www.micrel.com.
Features
•
3.0A minimum guaranteed output current
•
500mV maximum dropout voltage over temperature
−
Ideal for 3.0V to 2.5V conversion
−
Ideal for 2.5V to 1.8V, 1.65V, or 1.5V conversion
•
Stable with ceramic or tantalum capacitor
•
Wide input voltage range
−
V
IN
: 2.25V to 6.0V
•
+1.0% initial output tolerance
•
Fixed and adjustable output voltages:
−
MIC37300: 3-pin S-Pak fixed voltages
−
MIC37301: 5-pin S-Pak or 8-pin ePad SOIC fixed
voltages with flag
−
MIC37302: 5-pin adjustable voltage
−
MIC37303: 8-pin ePad SOIC, DFN adjustable voltage
with flag
•
Excellent line and load regulation specifications
•
Thermal-shutdown and current-limit protection
•
Reverse-leakage protection
•
Low profile S-Pak package
Applications
•
•
•
•
•
LDO linear regulator for low-voltage digital IC
PC add-in cards
High-efficiency linear power supplies
SMPS post regulator
Battery charger
Typical Application
Fixed 2.5 Regulator
Super ßeta PNP is a registered trademark of Micrel, Inc.
Adjustable Regulator
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
February 24, 2015
Revision 2.0
Micrel, Inc.
MIC37300/01/02/03
Pin Configuration
S-PAK-5 (R)
(Top View)
S-PAK-3 (R)
(Top View)
GND 1
8
7
6
5
FLG
VOUT/ADJ
VOUT
VOUT
5
4
3
2
1
FLG/ADJ
VOUT
GND
VIN
EN
EN 2
VIN
VIN
3
4
TO-263-5 (U)
(Top View)
e-Pad SOIC-8 (ME)
(Top View)
3mm × 3mm DFN (ML)
(Top View)
Pin Description
Pin Number
S-PAK-5
TO-263-5
1
2
3
4
5 (Fixed)
5 (Adj.)
—
Pin Number
S-PAK-3
—
1
2
3
—
—
—
Pin Number
ePad SOIC-8
DFN
2
3, 4
1
5, 6, 7 (Fixed)
5, 6 (Adj.)
8
7 (Adj.)
EP
Pin Name
Pin Function
Enable input: CMOS-compatible input. Logic HIGH = enable;
Logic LOW = shutdown. Do not leave floating.
Input voltage that supplies current to the output power device.
Ground: TAB is connected to ground.
Regulator output.
Error flag (output): Open collector output. Active LOW indicates
an output fault condition.
Adjustable regulator feedback input: Connect to resistor voltage
driver.
Connect to GND for best thermal performance.
EN
VIN
GND
VOUT
FLG
ADJ
ePad
February 24, 2015
3
Revision 2.0
Micrel, Inc.
MIC37300/01/02/03
Absolute Maximum Ratings
(2)
Supply Voltage (V
IN
) ...................................................... 6.5V
(4)
Enable Input Voltage (V
EN
) ......................................... 6.5V
(4)
Power Dissipation (P
D
) ........................... Internally Limited
Junction Temperature (T
J
) ..................–40°C ≤ T
J
≤ +125°C
Storage Temperature (T
S
) ...................–65°C ≤ T
J
≤ +150°C
Lead Temperature (soldering, 10s) ............................ 260°C
(5)
ESD Rating .................................................................. 2kV
Operating Ratings
(3)
Supply Voltage (V
IN
) ................................ 2.25V to 6.0V
Enable Input Voltage (V
EN
) ........................... 0V to 6.0V
Junction Temperature (T
J
) ........... –40°C ≤ T
J
≤ +125°C
Package Thermal Resistance
S-Pak (θ
JC
) ................................................5.5°C/W
TO-263-5 (θ
JC
) ..........................................6.3°C/W
ePad SOIC-8 (θ
JC
) .....................................16°C/W
3mm × 3mm DFN (θ
JC
) ..............................29°C/W
Electrical Characteristics
(6)
T
A
= 25°C with V
IN
= V
OUT
+ 1V; V
EN
= V
IN
; I
L
= 10mA;
bold
values indicate –40°C < T
J
< +125°C, unless noted.
Parameter
Output Voltage Accuracy
Output Voltage Line Regulation
Output Voltage Load Regulation
Condition
I
L
= 10mA
10mA < I
OUT
< I
L(max)
, V
OUT
+ 1 ≤ V
IN
≤ 6V
V
IN
= V
OUT
+ 1.0V to 6.0V; I
L
= 10mA
I
L
= 10mA to 3A
I
L
= 1.5A
(ePad SOIC-8, DFN)
I
L
= 3A
(ePad SOIC-8, DFN)
Ground Pin Current
(8)
Min.
-1
-2
Typ.
Max.
+1
+2
Units
%
%
%
%
mV
mV
mA
mA
µA
A
µs
0.02
0.2
175
300
27
1.0
4.75
170
0.5
1
350
400
500
550
40
50
5
6.5
500
V
IN
– V
OUT
Dropout Voltage
(7)
I
L
= 3A
V
IL
≤ 0.5V, V
IN
= V
OUT
+1V
V
OUT
= 0V
V
EN
= V
IN
, I
OUT
= 10mA, C
OUT
= 47µF
Ground Pin Current in Shutdown
Current Limit
Start-Up Time
Notes:
2. Exceeding the absolute maximum rating may damage the device.
3. The device is not guaranteed to function outside its operating rating.
4. P
D(max)
= (T
J(max)
– T
A
)/θ
JA
, where
θ
JA
, depends upon the printed circuit layout. See “Application Information.”
5. Devices are ESD sensitive. Handling precautions recommended.
6. Specification for packaged product only.
7. V
DO
= V
IN
– V
OUT
when V
OUT
decreases to 98% of its nominal output voltage with V
IN
= V
OUT
+ 1V. For output voltages below 1.75, dropout voltage
specification does not apply due to a minimum input operating voltage of 2.25V.
8. I
GND
is the quiescent current. I
IN
= I
GND
+ I
OUT
.
February 24, 2015
4
Revision 2.0
FPGA/CPLD
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