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74AUP1G79GM132

产品描述Flip Flops 1.8V 1G LP D-TYPE +
产品类别半导体    逻辑   
文件大小964KB,共24页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
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74AUP1G79GM132概述

Flip Flops 1.8V 1G LP D-TYPE +

74AUP1G79GM132规格参数

参数名称属性值
产品种类
Product Category
Flip Flops
制造商
Manufacturer
NXP(恩智浦)
RoHSDetails
Number of Circuits1
Logic FamilyAUP
Logic TypeCMOS
PolarityNon-Inverting
Input TypeSingle-Ended
输出类型
Output Type
Single-Ended
传播延迟时间
Propagation Delay Time
17.3 ns
High Level Output Current- 4 mA
Low Level Output Current4 mA
电源电压-最大
Supply Voltage - Max
3.6 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
XSON
系列
Packaging
Reel
系列
Packaging
MouseReel
系列
Packaging
Cut Tape
FunctionD-Type
高度
Height
0.46 mm
长度
Length
1.45 mm
Number of Channels1 Channel
Number of Input Lines1
Number of Output Lines1
工作电源电压
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Quiescent Current500 nA
工厂包装数量
Factory Pack Quantity
5000
电源电压-最小
Supply Voltage - Min
0.8 V
宽度
Width
1 mm

文档预览

下载PDF文档
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Rev. 6 — 28 June 2012
Product data sheet
1. General description
The 74AUP1G79 provides the single positive-edge triggered D-type flip-flop. Information
on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock
pulse. The D input must be stable one setup time prior to the LOW-to-HIGH clock
transition for predictable operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

74AUP1G79GM132相似产品对比

74AUP1G79GM132 74AUP1G79GV125
描述 Flip Flops 1.8V 1G LP D-TYPE + 8-bit Microcontrollers - MCU 32KB In-system Flash 20MHz 1.8V-5.5V
产品种类
Product Category
Flip Flops Flip Flops
制造商
Manufacturer
NXP(恩智浦) NXP(恩智浦)
RoHS Details Details
Number of Circuits 1 1
Logic Family AUP 74AUP1G79
Logic Type CMOS Positive Edge Triggered D Flip-Flop
传播延迟时间
Propagation Delay Time
17.3 ns 4.4 ns, 5.2 ns, 7.1 ns, 9 ns, 14.2 ns
电源电压-最大
Supply Voltage - Max
3.6 V 3.6 V
最小工作温度
Minimum Operating Temperature
- 40 C - 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C + 125 C
安装风格
Mounting Style
SMD/SMT SMD/SMT
封装 / 箱体
Package / Case
XSON SC-74A
工厂包装数量
Factory Pack Quantity
5000 3000
电源电压-最小
Supply Voltage - Min
0.8 V 0.8 V
系列
Packaging
Cut Tape Reel

 
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