73S8014RN
Smart Card Interface
Simplifying System Integration™
DATA SHEET
December 2008
DESCRIPTION
The Teridian 73S8014RN is a single smart card (ICC) interface
circuit, firmware compatible with 8024-type devices for
configurations where only asynchronous cards must be
supported. It is derived from the 73S8024RN industry-
standard electrical interface. The 73S8014RN has been
optimized to match most of the typical Set-Top Box / A/V
Conditional Access applications. Optimization essentially
involved a smaller pin-count and support for single I/O.
The 73S8014RN interfaces with the host processor through the
same bus (digital I/Os) as the 73S8024RN, which is compatible
with any other 8024-type IC.
As a result, the 73S8014RN is a
very attractive cost-reduction path from traditional 8024
ICs.
The 73S8014RN has been designed to provide full electrical
compliance with ISO 7816-3, EMV 4.0 and NDS specifications.
Interfacing with the system controller is done through a control
bus, composed of digital inputs to control the interface, and
one interrupt output to inform the system controller of the card
presence and faults.
The card clock can be generated by an on-chip oscillator using
an external crystal or by connection to an externally supplied
clock signal. In addition, the clock divider provides divisor
values of divide by 1, 2, 4 and 6 that are compatible with NDS
requirements.
The 73S8014RN incorporates an ISO 7816-3
activation/deactivation sequencer that controls the card
signals. Level-shifters drive the card signals with the selected
card voltage (3V or 5V), coming from an internal Low Drop-Out
(LDO) voltage regulator. This LDO regulator is powered by a
dedicated power supply input V
PC
. Digital circuitry is powered
separately by a digital power supply V
DD
. With its embedded
LDO regulator, the 73S8014RN is a cost-effective solution for
any application where a 5V (typically -5% +10%) power supply
is available.
Emergency card deactivation is initiated upon card extraction
or upon any fault detected by the protection circuitry. The fault
can be a card over-current, V
CC
undervoltage or power supply
fault (V
DD
). The card over-current circuitry is a true current
detection function, as opposed to V
CC
voltage drop detection,
as usually implemented in non-Teridian 8024 interface ICs.
The V
DD
voltage fault has a threshold voltage that can be
adjusted with an external resistor network. It allows automated
card deactivation at a customized V
DD
voltage threshold value.
It can be used, for instance, to match the system controller
operating voltage range.
APPLICATIONS
•
•
Set-Top Box Conditional Access and Pay-per-View
General purpose smart card readers
ADVANTAGES
•
•
•
NDS compliant
All NDS frequency divider rates of 4.5, 6.75 and
13.5MHz are supported from a 27MHz clock source
Same advantages as the Teridian 73S80xxR family:
Card V
CC
generated by an LDO regulator
Very low power dissipation (saves up to 1/2W)
Fewer external components are required
Better noise performance
True card over-current detection
Firmware compatibility with all 8024 ICs
Small format 20SO package
•
•
•
FEATURES
•
Card Interface:
Complies with ISO 7816-3, EMV 4.0 and NDS
73S8014RN device supports 3V / 5V cards up to 65mA
ISO 7816-3 Activation / Deactivation sequencer
Automated deactivation upon hardware fault (i.e. upon
drop on V
DD
power supply or card overcurrent)
The V
DD
voltage supervisor threshold value (fault) can
be externally adjusted
Over-current detection 130mA max
Card CLK clock frequency up to 20MHz
System Controller Interface:
3 Digital inputs control the card activation / deactivation,
card reset and card voltage
2 Digital inputs control the card clock frequency
1 Digital output, interrupt to the system controller,
reports to the host the card presence and faults
Crystal oscillator or host clock, up to 27MHz
Regulator Power Supply:
4.75V to 5.5V (EMV 4.0)
4.85V to 5.5V (NDS)
Digital Interfacing: 2.7V to 5.5V
6kV ESD protection on the card interface
Package: SO 20-pin
RoHS compliant (6/6) lead-free package
•
•
•
•
•
•
Rev. 1.0
© 2008 Teridian Semiconductor Corporation
1
73S8014RN Data Sheet
FUNCTIONAL DIAGRAM
VDD
GND
TEST
VPC
DS_8014RN_014
vdd circuits
VCC FAULT
VDDF_ADJ
INTERNAL POWER SUPPLY
VOLTAGE REFERENCE
VPD -
internal supply
VDD FAULT
vref
bias currents
LDO
REGULATOR
R-C
OSC.
CMDVCC
RSTIN
5V/#V
TEST
CONTROLLER
AND
REGISTERS
FAULT LOGIC
1.5MHz
VCC
OFF
PRES
CKDIV1
CKDIV2
XTALIN
XTAL
OSC
XTALOUT
vdd circuits
CLOCK
RESET
BUFFER
SC
SEQUENCER
CLOCK
BUFFER
RST
CLOCK
GENERATION
CLK
I/O
IOUC
SMART CARD I/O BUFFER
vcc circuits
73S8014RN
Figure 1: 73S8014RN Block Diagram
2
Rev. 1.0
DS_8014RN_014
73S8014RN Data Sheet
Table of Contents
1
2
Pinout ................................................................................................................................................................ 5
Electrical Specifications .................................................................................................................................. 8
2.1
Absolute Maximum Ratings ........................................................................................................................ 8
2.2
Recommended Operating Conditions ......................................................................................................... 8
2.3
Package Thermal Parameters .................................................................................................................... 8
2.4
Smart Card Interface Requirements ........................................................................................................... 9
2.5
Characteristics: Digital Signals.................................................................................................................. 11
2.6
DC Characteristics .................................................................................................................................... 12
2.7
Voltage Fault Detection Circuits ................................................................................................................ 12
3
Applications Information ............................................................................................................................... 13
3.1
Example 73S8014RN Schematics ............................................................................................................ 13
3.2
NDS Precautions ....................................................................................................................................... 13
3.3
System Controller Interface....................................................................................................................... 15
3.4
Power Supply and Voltage Supervision .................................................................................................... 15
3.5
Card Power Supply ................................................................................................................................... 16
3.6
On-Chip Oscillator and Card Clock ........................................................................................................... 16
3.7
Activation Sequence ................................................................................................................................. 16
3.8
Deactivation Sequence ............................................................................................................................. 18
3.9
Fault Detection and
OFF
........................................................................................................................... 19
3.10
I/O Circuitry and Timing ......................................................................................................................... 19
4
Equivalent Circuits ......................................................................................................................................... 21
5
Mechanical Drawing ....................................................................................................................................... 26
6
Ordering Information ..................................................................................................................................... 27
7
Related Documentation ................................................................................................................................. 27
8
Contact Information ....................................................................................................................................... 27
Revision History .................................................................................................................................................... 28
Rev. 1.0
3
73S8014RN Data Sheet
DS_8014RN_014
Figures
Figure 1: 73S8014RN Block Diagram ....................................................................................................................... 2
Figure 2: 73S8014RN 20-SOP Pin Out ..................................................................................................................... 5
Figure 3: 73S8014RN – Typical Application Schematic .......................................................................................... 14
Figure 4: Activation Sequence – RSTIN Low When
CMDVCC
Goes Low ............................................................. 16
Figure 5: Activation Sequence – RSTIN High When
CMDVCC
Goes Low............................................................. 17
Figure 6: Deactivation Sequence ............................................................................................................................ 18
Figure 7: Timing Diagram – Management of the Interrupt Line
OFF
...................................................................... 19
Figure 8: I/O and I/OUC State Diagram................................................................................................................... 20
Figure 9: I/O – I/OUC Delays – Timing Diagram ..................................................................................................... 20
Figure 10: Open Drain type –
OFF
.......................................................................................................................... 21
Figure 11: Power Input/Output Circuit, V
DD
, V
PC
, V
CC
.............................................................................................. 21
Figure 12: Type 5 – Smart Card CLK Driver Circuit ................................................................................................ 22
Figure 13: Type 6 – Smart Card RST Driver Circuit ................................................................................................ 22
Figure 14: Type 7A – Smart Card IO Interface Circuit ............................................................................................ 23
Figure 15: Type 7B – Smart Card IOUC Interface Circuit ....................................................................................... 23
Figure 16: Type 8 – General Input Circuit ............................................................................................................... 24
Figure 17: Oscillator Circuit ..................................................................................................................................... 24
Figure 18: VDD
FLT_ADJ
.............................................................................................................................................. 25
Figure 19: Mechanical Drawing 20-Pin SO Package .............................................................................................. 26
Tables
Table 1: 73S8014RN 20-Pin SOP Pin Definitions ..................................................................................................... 6
Table 2: Absolute Maximum Device Ratings ............................................................................................................. 8
Table 3: Recommended Operating Conditions ......................................................................................................... 8
Table 4: Package Thermal Parameters ..................................................................................................................... 8
Table 5: DC Smart Card Interface Requirements ..................................................................................................... 9
Table 6: Digital Signals Characteristics ................................................................................................................... 11
Table 7: DC Characteristics ..................................................................................................................................... 12
Table 8: Voltage Fault Detection Circuits ................................................................................................................ 12
Table 9: Order Numbers and Packaging Marks ...................................................................................................... 27
4
Rev. 1.0
DS_8014RN_014
73S8014RN Data Sheet
1 Pinout
The 73S8014RN is supplied as 20-pin SO package.
OFF
RSTIN
I/OUC
VPC
CLKDIV2
CMDVCC
5V/#V
GND
XTALIN
XTALOUT
1
2
3
4
5
20
19
18
17
16
CLKDIV1
PRES
VCC
CLK
GND
RST
I/O
VDD
VDDF_ADJ
TEST
73S8014RN
6
7
8
9
10
15
14
13
12
11
Figure 2: 73S8014RN 20-SOP Pin Out
Rev. 1.0
5
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