S-24C02D/04D/08D/16D
www.ablicinc.com
© ABLIC Inc., 2012
2-WIRE SERIAL E
2
PROM
Rev.3.0
_02_U
This IC is a 2-wire, low current consumption and wide range operation serial E
2
PROM. This IC has the capacity of 2 K-bit,
4 K-bit, 8-K bit and 16 K-bit, and the organization is 256 words
8-bit, 512 words
8-bit, 1024 words
8-bit and 2048 words
8-bit, respectively. Page write and sequential read are available.
Caution
This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or automobile
equipment including car audio, keyless entry and engine control unit, contact to ABLIC Inc. is
indispensable.
Features
Operation voltage range
Read:
1.7 V to 5.5 V
Write:
1.7 V to 5.5 V
Operation frequency:
1.0 MHz max. (V
CC
= 2.5 V to 5.5 V)
400 kHz max. (V
CC
= 1.7 V to 5.5 V)
Write time:
5.0 ms max.
Page write
S-24C02D:
8 bytes / page
S-24C04D: 16 bytes / page
S-24C08D: 16 bytes / page
S-24C16D: 16 bytes / page
Sequential read
Noise suppression:
Schmitt trigger and noise filter on input pins (SCL, SDA)
Write protect function during low power supply voltage
Endurance:
10
6
cycle / word
*1
(Ta =
25C)
Data retention: 100 years (Ta =
25C)
Memory capacity
S-24C02D:
2 K-bit
S-24C04D:
4 K-bit
S-24C08D:
8 K-bit
S-24C16D: 16 K-bit
Write protect:
100%
Initial delivery state:
FFh
Operation temperature range:
Ta =
40°C
to
85°C
Lead-free (Sn 100%), halogen-free
*1.
For each address (Word: 8-bit)
Packages
8-Pin SOP (JEDEC)
5
8
1
4
SOT-23-5
4
5
1
3
(5.0
6.0
t1.75 mm)
(2.8
2.9
t1.3 mm)
8-Pin TSSOP
5
4
DFN-8(2030)
5
8
1
4
8
1
(3.0
6.4
t1.1 mm)
(3.0
2.0
t0.5 mm)
TMSOP-8
8
5
4
1
SNT-8A
5
8
4
1
(2.9
4.0
t0.8 mm)
(2.5
2.0
t0.5 mm)
1
2-WIRE SERIAL E
2
PROM
S-24C02D/04D/08D/16D
Block Diagram
VCC
Rev.3.0
_02_U
WP
SCL
SDA
Start / Stop
Detector
Serial Clock
Controller
LOAD
Device Address
Comparator
COMP
LOAD INC
A0
*1
A1
*2
A2
*3
R/W
Address
Counter
X Decoder
GND
Voltage Detector
High-Voltage Generator
Data Register
Memory Cell Array
Y Decoder
Selector
D
IN
D
OUT
Data Output
ACK Output
Controller
*1.
*2.
*3.
This pin is not available for the S-24C04D/08D/16D.
This pin is not available for the S-24C08D/16D.
This pin is not available for the S-24C16D.
The A0 pin, the A1 pin and the A2 pin are no connection in the product with SOT-23-5 package.
Remark
2
Rev.3.0
_02_U
Product Name Structure
1.
Product name
S-24CxxD
I
-
xxxx
U
5
2-WIRE SERIAL E
2
PROM
S-24C02D/04D/08D/16D
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package name (abbreviation) and IC packing specification
*1
J8T1: 8-Pin SOP (JEDEC), Tape
T8T1: 8-Pin TSSOP, Tape
K8T3: TMSOP-8, Tape
M5T1: SOT-23-5, Tape
A8T1: DFN-8(2030), Tape
I8T1: SNT-8A, Tape
Operation temperature
I:
Ta =
40°C
to
85°C
Product name
S-24C02D: 2 K-bit
S-24C04D: 4 K-bit
S-24C08D: 8 K-bit
S-24C16D: 16 K-bit
*1.
Refer to the tape drawing.
2.
Packages
Dimension
FJ008-Z-P-SD
FT008-Z-P-SD
FM008-A-P-SD
MP005-A-P-SD
PP008-A-P-S1
PH008-A-P-SD
Tape
FJ008-Z-C-SD
FT008-Z-C-SD
FM008-A-C-SD
MP005-B-C-SD
PP008-A-C-SD
PH008-A-C-SD
Reel
FJ008-Z-R-SD
FT008-Z-R-SD
FM008-A-R-SD
MP005-B-R-SD
PP008-A-R-SD
PH008-A-R-SD
Land
PP008-A-L-SD
PH008-A-L-SD
Package Name
8-Pin SOP (JEDEC)
8-Pin TSSOP
TMSOP-8
SOT-23-5
DFN-8(2030)
SNT-8A
3
Rev.3.0
_02_U
Pin Configurations
1.
8-Pin SOP (JEDEC), 8-Pin TSSOP, TMSOP-8, DFN-8(2030), SNT-8A
Top view
1
2
3
4
8
7
6
5
2-WIRE SERIAL E
2
PROM
S-24C02D/04D/08D/16D
Pin No.
1
2
3
4
5
6
Symbol
S-24C02D S-24C04D S-24C08D
NC
*2
NC
*2
A0
NC
*2
A1
A1
A2
A2
A2
GND
GND
GND
*1
*1
SDA
SDA
SDA
*1
SCL
*1
SCL
*1
SCL
*1
S-24C16D
NC
*2
NC
*2
NC
*2
GND
SDA
*1
SCL
*1
Description
Slave address input
Slave address input
Slave address input
Ground
Serial data I/O
Serial clock input
Write protect input
Connected to V
CC
:
Protection valid
Open or connected to GND:
Protection invalid
Power supply
7
WP
WP
WP
WP
8
VCC
VCC
VCC
VCC
2.
SOT-23-5
Top view
5
4
Pin No.
1
2
3
4
5
Symbol
SCL
GND
SDA
*1
VCC
WP
*1
Description
Serial clock input
Ground
Serial data I/O
Power supply
Write protect input
Connected to V
CC
:
Open or connected to GND:
1 2 3
Protection valid
Protection invalid
*1.
*2.
Do not use it in "High-Z".
The NC is no connection.
Remark
For DFN-8(2030) package, connect the heatsink of back side to the board, and set electric potential open or GND.
However, do not use it as the function of electrode.
5
FPGA/CPLD
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