NJU6535
Preliminary
1/3 , 1/4 Duty LCD Driver
GENERAL DESCRIPTION
The
NJU6535
is a 1/3 or 1/4 duty LCD driver for
segment type LCD panel with key scan function
transmitting the 30 keys maximum scanned data (6 x 5 =
30) to CPU.
The
NJU6535
chooses numbers of common, key scan,
and general purpose ports by instructions. Therefore, It
drives 126 segments at 1/3 duty in use of 3 commons and
42 segments or 164 segments at 1/4 duty in use of 4 and
41. Also it provides 4 general purpose output ports
maximum to drive LEDs or others directly.
Furthermore, the NJU6535 can select a LCD driving
voltage out of 8 steps voltage by the instruction to adjust
the display contrast of LCD panel.
PACKAGE OUTLINE
NJU6535FG1
NJU6535FH1
FEATURES
42-segment Drivers
Programmable Duty Ratio
1/3 Duty : 126-segment (Maximum)
1/4 Duty : 164-segment (Maximum)
30-key Scan Function (6X5 matrix)
Needless for anti-reverse current diodes in key scan
Programmable Bias Ratio 1/2, 1/3 bias
Output Port for LED (maximum 4 LED)
Serial Interface (SI, SO, SCL, CS)
Useful Instruction set
Incorporated LCD Driving Voltage Generator Circuits
Electrical Variable Resistance (8-step)
Logic Operating Voltage
4.5 ~ 5.5V
LCD Driving Voltage
~5.5V
Package Outline
QFP64-G1
QFP64-H1
C-MOS Technology (Substrate :P)
02/08/06
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NJU6535
PIN LOCATION
S
4
S
3
S
2
SEG
42
/S
1
SEG
41
/S
0
SEG
40
/COM
4
COM
3
COM
2
COM
1
SEG
39
SEG
38
SEG
37
SEG
36
SEG
35
SEG
34
SEG
33
S
5
K
0
K
1
K
2
K
3
K
4
V
DD
V
0
V
1
V
2
V
SS
OSC
SO
CE
SCL
SI
SEG
32
SEG
31
SEG
30
SEG
29
SEG
28
SEG
27
SEG
26
SEG
25
SEG
24
SEG
23
SEG
22
SEG
21
SEG
20
SEG
19
SEG
18
SEG
17
SEG
1
/P
0
SEG
2
/P
1
SEG
3
/P
2
SEG
4
/P
3
SEG
5
SEG
6
SEG
7
SEG
8
SEG
9
SEG
10
SEG
11
SEG
12
SEG
13
SEG
14
SEG
15
SEG
16
VDD
E.V.R.
Common
Driver
V0
Instruction
V1
V2
VSS
Data Buffer
Instruction
decoder
OSC
Oscillator
Key Buffer
VDD
Reset
VSS
Reset
I/O Buffer
SEG1/P0
SEG2/P1
SEG3/P2
SEG4/P3
BLOCK DIAGRAM
COM1
COM2
COM3
Segment Driver
General output Driver
Display Data Buffer
Key Scan controller
SCL
SO
CE
K0
K1
K2
K3
K4
S2
S3
S4
S5
SI
SEG37
SEG38
SEG39
SEG40/COM4
SEG41/S0
SEG42/S1
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NJU6535
TERMINAL DESCRIPTION 1
No.
1
2
3
4
5 to 39
40
41
42
43
44
45
46
47
48
49
50 to 54
55
56
57
58
59
60
SYMBOL
SEG1/P0
SEG2/P1
SEG3/P2
SEG4/P3
SEG5 to
SEG39
COM1
COM2
COM3
SEG40/COM4
SEG41/S0
SEG42/S1
S2 to S6
I/O
O
FUNCTION
LCD Segment output terminal / General output terminal.
Select Segment output terminal or General output terminal by the instruction.
O
O
LCD Segment output terminal
LCD Common output terminal
O
O
O
LCD Segment output terminal / LCD Common output terminal
SEG40 in 1/3Duty use, COM4 in 1/4Duty use.
LCD Segment output terminals / key scanning output terminals
Select Segment output terminal or key scanning output terminal by the
instruction. (No need for anti-reverse current diode in key scan)
Key scanning output terminals.
(No need for anti-reverse current diode in key scan)
K0 to K4
V
DD
V
0
V
1
V
2
V
SS
OSC
I
-
I
Key scanning input terminals.
(with internal pull-down resistor)
Power source: VDD=5V with LCD driving voltage input.
LCD driving voltage stabilization capacitor terminals.
In use of 1/2 bias, connects V
1
to V
2.
GND: VSS=0V
System clock input terminal
This terminal should be open for internal clock operation.
Change Oscillation frequency by connecting capacitor and resistor. Inputs
external oscillation clock.
Data output terminal.
Chip enable terminal.
Shift clock input terminal.
Data input terminal.
-
I/O
61
62
63
64
SO
CE
SCL
SI
O
I
I
I
-3-
NJU6535
FUNCTIONAL DESCRIPTION
(1) Description for each blocks
(1-1) Serial I/F
The Serial I/F controls serial data from external data.
(1-2) Instruction Reg.
The Instruction Register stores instruction code from external.
(1-3) Instruction Decoder.
The instruction decoder decodes instruction code and controls each blocks
(1-4) Data Buffer for Display.
The Data Buffer for Display stores data for display from external.
(1-5) Segment Driver /
General output Driver.
The Segment Driver generates driving waveform to Segment terminal on Display data.
The
General output Driver
generates “H” or “L” level to
General output
terminal on output data.
(1-6) Common Driver.
The Common Driver generates driving waveform to Common terminal .
(1-7) Electrical Variable Resistance (E.V.R.)
The Electrical Variable Resistance adjusts LCD Driving Voltage from V0 to V2.
(1-8) Key Scan Controller.
The Key Scan Controller controls to input from external KEY data.
(1-9) Data buffer for Key.
The Data buffer for key stores Key Data until next key data is stored.
(1-10) CR Oscillator
The Oscillator is CR oscillator which generates the master clock.
(1-11) Reset Circuit
The Reset circuit is type of detectable voltage. It resets internal circuit when the power turns on or drop
the voltage.
The Reset circuit is initializes the
NJU6535
at Power ON and OFF. It generates reset signal to initialize
the system at low VDD less than power down detection voltage (2.5V typical).
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NJU6535
INSTRUCTIONS
The instruction code is consisted of 12-bits data and inputs with display data. (see “Table 1 Instruction Code).
Table 1.
DY
E0
E1
E2
S0
Instruction Code
S1
K0
K1
P0
P1
SC
DR
Instruction
Duty Select
Symbol
DY
EVR Register Set
Power Save mode set
E0-E2
S0-S1
Segment output /
Key scan output selection
Segment output /
General output port selection
K0, K1
P0, P1
Display ON / OFF
Bias selection
SC
DR
Description
Set the 1/3duty or 1/4duty.
0: 1/3 Duty
1: 1/4 Duty
Set the contraction for
000 – 111 (8-voltage conditions)
00: Normal
01: Power save 1
10: Power save 2
11: Power save 3
00: 30 keys
01: 25 keys
1x: 20 keys
“x” is Don’t care
00: 4 segment outputs
01: 2 General output ports
10: 3 General output ports
11: 4 General output ports
0: Display ON
1: Display OFF
0: 1/3 bias
1: 1/2 bias (connect V1 to V2 terminal)
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