PD -97148A
IRLS3036-7PPbF
HEXFET
®
Power MOSFET
Applications
l
DC Motor Drive
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
G
l
Hard Switched and High Frequency Circuits
Benefits
l
Optimized for Logic Level Drive
l
Very Low R
DS(ON)
at 4.5V V
GS
l
Superior R*Q at 4.5V V
GS
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
D
S
V
DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
60V
1.5m
:
1.9m
:
300A
c
240A
D
S
G
S
S
S
S
D
2
Pak 7 Pin
G
D
S
Gate
Drain
Max.
300c
210
240
1000
380
2.5
± 16
8.1
-55 to + 175
300
300
See Fig. 14, 15, 22a, 22b
Source
Units
A
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
e
Avalanche Current
d
Repetitive Avalanche Energy
d
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
Parameter
Junction-to-Case
kl
Junction-to-Ambient (PCB Mount, steady state)
j
Typ.
–––
–––
Max.
0.40
40
Units
°C/W
www.irf.com
1
10/28/10
IRLS3036-7PPbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
60
–––
–––
–––
1.0
–––
–––
–––
–––
–––
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
ΔV
(BR)DSS
/ΔT
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G(int)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
––– –––
V V
GS
= 0V, I
D
= 250μA
0.059 ––– V/°C Reference to 25°C, I
D
= 5mAd
1.5
1.9
V
GS
= 10V, I
D
= 180A
g
mΩ
V
GS
= 4.5V, I
D
= 150A
g
1.7
2.2
–––
2.5
V V
DS
= V
GS
, I
D
= 250μA
–––
20
V
DS
= 60V, V
GS
= 0V
μA
––– 250
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
––– 100
V
GS
= 16V
nA
––– -100
V
GS
= -16V
1.9
–––
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)i
Effective Output Capacitance (Time Related)
h
Min. Typ. Max. Units
390 ––– –––
––– 110 160
–––
33
–––
–––
53
–––
–––
57
–––
–––
81
–––
––– 540 –––
–––
89
–––
––– 170 –––
––– 11270 –––
––– 1025 –––
––– 520 –––
––– 1460 –––
––– 1630 –––
S
Conditions
V
DS
= 10V, I
D
= 180A
I
D
= 180A
V
DS
= 30V
nC
V
GS
= 4.5V
g
I
D
= 180A, V
DS
=0V, V
GS
= 4.5V
V
DD
= 39V
I
D
= 180A
ns
R
G
= 2.1Ω
V
GS
= 4.5V
g
V
GS
= 0V
V
DS
= 50V
pF ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 48V
i
V
GS
= 0V, V
DS
= 0V to 48V
h
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
e
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
300
A
1000
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
––– –––
1.3
V
–––
57
–––
ns
–––
60
–––
––– 140 –––
nC
T
J
= 125°C
––– 160 –––
–––
4.6
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 180A, V
GS
= 0V
g
V
R
= 51V,
T
J
= 25°C
I
F
= 180A
T
J
= 125°C
di/dt = 100A/μs
g
T
J
= 25°C
Calculated continuous current based on maximum allowable junction
temperature Bond wire current limit is 240A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.018mH
R
G
= 25Ω, I
AS
= 180A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
180A, di/dt
≤
1070A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
R
θJC
value shown is at time zero.
2
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IRLS3036-7PPbF
1000
TOP
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
1000
TOP
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
10
100
1
2.7V
≤
60μs PULSE WIDTH
Tj = 25°C
2.7V
≤
60μs PULSE WIDTH
Tj = 175°C
10
0.1
1
10
100
0.1
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
2.5
Fig 2.
Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
ID = 180A
2.0
ID, Drain-to-Source Current
(Α)
VGS = 10V
TJ = 175°C
100
(Normalized)
1.5
TJ = 25°C
10
1.0
VDS = 25V
≤
60μs PULSE WIDTH
1
2.0
3.0
4.0
5.0
0.5
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
20000
VGS = 0V,
f = 100 kHz
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
5
VGS, Gate-to-Source Voltage (V)
ID= 180A
4
VDS = 48V
VDS = 30V
15000
C, Capacitance (pF)
Ciss
10000
3
2
5000
Coss
Crss
1
0
1
10
100
0
0
20
40
60
80
100
120
140
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRLS3036-7PPbF
1000
10000
ID, Drain-to-Source Current (A)
TJ = 175°C
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100μsec
ISD , Reverse Drain Current (A)
100
1000
10
TJ = 25°C
100
1msec
10
LIMITED BY PACKAGE
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
1
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
DC
0.1
10
100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
300
LIMITED BY PACKAGE
250
ID , Drain Current (A)
V(BR)DSS , Drain-to-Source Breakdown Voltage
80
Fig 8.
Maximum Safe Operating Area
ID = 5mA
200
150
100
50
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
70
60
50
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
Fig 9.
Maximum Drain Current vs.
Case Temperature
4.0
TJ , Junction Temperature (°C)
Fig 10.
Drain-to-Source Breakdown Voltage
1200
EAS, Single Pulse Avalanche Energy (mJ)
1000
3.0
ID
TOP
22A
37A
BOTTOM
180A
800
Energy (μJ)
2.0
600
400
1.0
200
0.0
0
10
20
30
40
50
60
70
0
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy Vs. DrainCurrent
4
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IRLS3036-7PPbF
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20
0.10
0.05
0.02
0.01
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
R
3
R
3
τ
C
τ
1
τ
2
τ
3
τ
3
τ
Ri (°C/W)
τι
(sec)
0.01
Ci=
τi/Ri
Ci=
τi/Ri
0.103731 0.000184
0.196542 0.001587
0.098271 0.006721
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj
= 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
100
0.01
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
300
EAR , Avalanche Energy (mJ)
250
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 180A
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
175
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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