AUTOMOTIVE GRADE
Features
Optimized for Logic Level Drive
Advanced Process Technology
Ultra Low On-Resistance
Logic Level Gate Drive
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating tempera-
ture, fast switching speed and improved repetitive avalanche rat-
ing . These features combine to make this design an extremely
efficient and reliable device for use in Automotive applications and
a wide variety of other applications.
Base part number
AUIRLSL4030
AUIRLS4030
Package Type
TO-262
D
2
-Pak
AUIRLS4030
AUIRLSL4030
HEXFET
®
Power MOSFET
D
V
DSS
R
DS(on)
typ.
100V
3.4m
4.3m
180A
D
G
S
max
I
D
D
S
G
D Pak
AUIRLS4030
2
G
S
D
TO-262
AUIRLSL4030
G
Gate
D
Drain
S
Source
Standard Pack
Form
Quantity
Tube
50
Tube
50
Tape and Reel Left
800
Orderable Part Number
AUIRLSL4030
AUIRLS4030
AUIRLS4030TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally limited)
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature for 10 seconds
Max.
180
130
730
370
2.5
± 16
305
See Fig. 14, 15, 22a, 22b
21
-55 to + 175
300(1.6mm from case)
Typ.
–––
–––
Max.
0.4
40
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Symbol
Parameter
Junction-to-Case
R
JC
Junction-to-Ambient (PCB Mount), D2 Pak
R
JA
HEXFET® is a registered trademark of Infineon.
*Qualification
standards can be found at
www.infineon.com
Units
°C/W
1
2015-11-6
AUIRLS/SL4030
Static Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
100
–––
–––
V V
GS
= 0V, I
D
= 250µA
––– 0.10 ––– V/°C Reference to 25°C, I
D
= 5mA
V
(BR)DSS
/T
J
Breakdown Voltage Temp. Coefficient
–––
3.4
4.3
V
GS
= 10V, I
D
= 110A
Static Drain-to-Source On-Resistance
R
DS(on)
m
–––
3.6
4.5
V
GS
= 4.5V, I
D
= 92A
V
GS(th)
Gate Threshold Voltage
1.0
–––
2.5
V V
DS
= V
GS
, I
D
= 250µA
gfs
Forward Trans conductance
320
–––
–––
S V
DS
= 25V, I
D
= 110A
–––
–––
20
V
DS
= 100V, V
GS
= 0V
Drain-to-Source Leakage Current
µA
I
DSS
–––
–––
250
V
DS
= 100V, V
GS
= 0V, T
J
= 125°C
I
GSS
Gate-to-Source Forward Leakage
–––
–––
100
V
GS
= 16V
nA
Gate-to-Source Reverse Leakage
–––
––– -100
V
GS
= -16V
R
G
Internal Gate Resistance
–––
2.1
–––
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
Q
g
Total Gate Charge
–––
87
130
I
D
= 110A
V
DS
= 50V
Q
gs
Gate-to-Source Charge
–––
27
–––
nC
V
GS
= 4.5V
Q
gd
Gate-to-Drain ("Miller") Charge
–––
45
–––
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
)
–––
42
–––
t
d(on)
Turn-On Delay Time
–––
74
–––
V
DD
= 65V
I
D
= 110A
t
r
Rise Time
–––
330
–––
ns
t
d(off)
Turn-Off Delay Time
–––
110
–––
R
G
= 2.7
V
GS
= 4.5V
Fall Time
–––
170
–––
t
f
C
iss
Input Capacitance
––– 11360 –––
V
GS
= 0V
V
DS
= 50V
C
oss
Output Capacitance
–––
670
–––
C
rss
Reverse Transfer Capacitance
–––
290
–––
pF ƒ = 1.0 MHz
C
oss
eff. (ER) Effective Output Capacitance (Energy Related) –––
760
–––
V
GS
= 0V, V
DS
= 0V to 80V
C
oss
eff. (TR) Effective Output Capacitance (Time Related)
––– 1140 –––
V
GS
= 0V, V
DS
= 0V to 80V
Diode Characteristics
Symbol
Parameter
Continuous Source Current
I
S
(Body Diode)
Pulsed Source Current
I
SM
(Body Diode)
V
SD
Diode Forward Voltage
t
rr
Q
rr
I
RRM
t
on
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min.
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
50
60
88
130
3.3
180
A
730
1.3
–––
–––
–––
–––
–––
V
ns
nC
A
Max. Units
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 110A, V
GS
= 0V
T
J
= 25°C V
R
= 85V,
T
J
= 125°C I = 110A
F
T
J
= 25°C di/dt = 100A/µs
T
J
= 125°C
T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.05mH, R
G
= 25, I
AS
= 110A, V
GS
=10V. Part not recommended for use above this value.
110A, di/dt
1330A/µs, V
DD
V
(BR)DSS
, T
J
175°C.
I
SD
Pulse width
400µs; duty cycle
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
R
is measured at T
J
approximately 90°C.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994.
JC
value shown is at time zero.
R
2
2015-11-6
1000
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
AUIRLS/SL4030
1000
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
10
2.5V
2.5V
60µs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
10
0.1
1
60µs PULSE WIDTH
Tj = 175°C
10
100
1000
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
Fig 2.
Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
2.0
ID = 110A
V GS = 10V
100
TJ = 175°C
TJ = 25°C
1.5
1.0
10
V DS = 50V
60µs PULSE WIDTH
1.0
1
2
3
4
5
0.5
0.0
-60 -40 -20 0 20 40 60 80 100 120 140160 180
TJ , Junction Temperature (°C)
V GS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
5.0
ID= 110A
V GS, Gate-to-Source Voltage (V)
V DS= 80V
V DS= 50V
4.0
C, Capacitance (pF)
10000
Ciss
3.0
Coss
1000
Crss
2.0
1.0
100
1
10
V DS, Drain-to-Source Voltage (V)
100
0.0
0
20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
3
Fig 6.
Typical Gate Charge vs.
Gate-to-Source Voltage
2015-11-6
1000
TJ = 175°C
100
AUIRLS/SL4030
10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100µsec
100
10msec
1msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
DC
10
TJ = 25°C
1
V GS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
2.5
V SD, Source-to-Drain Voltage (V)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
Fig 7.
Typical Source-Drain Diode Forward Voltage
V (BR)DSS, Drain-to-Source Breakdown Voltage (V)
Fig 8.
Maximum Safe Operating Area
125
Id = 5mA
120
115
110
105
100
95
90
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Temperature ( °C )
200
180
160
ID, Drain Current (A)
140
120
100
80
60
40
20
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 9.
Maximum Drain Current vs. Case Temperature
4.5
4.0
3.5
3.0
Energy (µJ)
Fig 10.
Drain-to-Source Breakdown Voltage
1400
EAS , Single Pulse Avalanche Energy (mJ)
1200
1000
800
600
400
200
0
25
50
75
100
ID
TOP
17A
40A
BOTTOM 110A
2.5
2.0
1.5
1.0
0.5
0.0
-20
0
20
40
60
80
100
120
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 11.
Typical C
oss
Stored Energy
4
Fig 12.
Maximum Avalanche Energy vs. Drain Current
2015-11-6
AUIRLS/SL4030
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
J
J
1
R
1
R
1
2
R
2
R
2
R
3
R
3
C
1
2
3
3
C
Ri (°C/W)
0.0477
0.1631
0.1893
i
(sec)
0.000071
0.000881
0.007457
Ci=
iRi
Ci=
iRi
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Avalanche Current vs. Pulse Width
350
300
EAR , Avalanche Energy (mJ)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 110A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy vs. Temperature
5
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
22a, 22b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. I
av
= Allowable avalanche current.
7.
T
= Allowable rise in junction temperature, not to exceed T
jmax
(assumed as 25°C in Figure 14, 15).
t
av
= Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·I
av
) =
T/
Z
thJC
I
av
= 2T/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)·
t
av
2015-11-6
FPGA/CPLD
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